IP Library › Granted Patent US 12713767
Granted Patent B2
US 12713767 · App. 18/127,198 · Granted Aug 18, 2026

Semiconductor device

Inventors: Yasuharu Hosaka (Tochigi, JP); Masami Jintyou (Shimotsuga, JP); Takahiro Iguchi (Nikko, JP); Chieko Misawa (Utsunomiya, JP); Ami Sato (Tochigi, JP); Masayoshi Dobashi (Shimotsuga, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10K59/1213H10K59/1201
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Quick Facts
Patent No.
US 12713767
App. No.
18/127,198
Granted
Aug 18, 2026
Kind
B2
Abstract

Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween. The second semiconductor layer is positioned over the first insulating layer and in contact with side and top surfaces of a side end portion of the fourth conductive layer and side and top surfaces of a side end portion of the fifth conductive layer; the side end portions face each other. The sixth conductive layer is positioned over the second semiconductor layer with the third insulating layer positioned therebetween. The first transistor is electrically connected to the second transistor.

Claims (67)

1 . A semiconductor device comprising:

a first transistor;

a second transistor; and

a first insulating layer,

wherein the first transistor comprises a first semiconductor layer, a second insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer,

wherein the second transistor comprises a second semiconductor layer, a third insulating layer, a fourth conductive layer, a fifth conductive layer, and a sixth conductive layer,

wherein the first insulating layer comprises a region in contact with a side surface of the first semiconductor layer and a first top surface of the first conductive layer,

wherein the first insulating layer comprises an opening reaching the first conductive layer,

wherein the first semiconductor layer is in direct contact with a second top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer,

wherein the second conductive layer is positioned over the first insulating layer,

wherein the third conductive layer is positioned over the first semiconductor layer and comprises a region overlapping with the inner wall of the opening with the second insulating layer positioned between the third conductive layer and the first semiconductor layer,

wherein the second semiconductor layer is positioned over the first insulating layer, and in contact with a side surface and a top surface of a side end portion of the fourth conductive layer and a side surface and a top surface of a side end portion of the fifth conductive layer, the side end portions facing each other,

wherein the sixth conductive layer is positioned over the second semiconductor layer with the third insulating layer positioned between the sixth conductive layer and the second semiconductor layer, and

wherein the first transistor is electrically connected to the second transistor.

2 . The semiconductor device according to claim 1 ,

wherein the first semiconductor layer and the second semiconductor layer each comprise an oxide semiconductor.

3 . The semiconductor device according to claim 1 ,

wherein the second conductive layer and the sixth conductive layer share one conductive layer.

4 . The semiconductor device according to claim 1 ,

wherein the third conductive layer and the fourth conductive layer share one conductive layer.

5 . The semiconductor device according to claim 1 ,

wherein the second conductive layer and the fourth conductive layer share one conductive layer.

6 . A semiconductor device comprising:

a first transistor;

a second transistor; and

a first insulating layer,

wherein the first transistor comprises a first semiconductor layer, a second insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer,

wherein the second transistor comprises a second semiconductor layer, a third insulating layer, a fourth conductive layer, a fifth conductive layer, and a sixth conductive layer,

wherein the first insulating layer comprises a region in contact with a side surface of the first semiconductor layer and a top surface of the sixth conductive layer,

wherein the first insulating layer comprises an opening reaching the first conductive layer,

wherein the first semiconductor layer is in direct contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer,

wherein the second conductive layer is positioned over the first insulating layer,

wherein the third conductive layer is positioned over the first semiconductor layer and comprises a region overlapping with the inner wall of the opening with the second insulating layer positioned between the third conductive layer and the first semiconductor layer,

wherein the second semiconductor layer is positioned below the first insulating layer, and in contact with a side surface and a top surface of a side end portion of the fourth conductive layer and a side surface and a top surface of a side end portion of the fifth conductive layer, the side end portions facing each other,

wherein the sixth conductive layer is positioned over the second semiconductor layer with the third insulating layer positioned between the sixth conductive layer and the second semiconductor layer, and

wherein the first transistor is electrically connected to the second transistor.

7 . The semiconductor device according to claim 6 ,

wherein the first semiconductor layer and the second semiconductor layer each comprise an oxide semiconductor.

8 . The semiconductor device according to claim 6 ,

wherein the first conductive layer and the sixth conductive layer share one conductive layer.

9 . The semiconductor device according to claim 6 ,

wherein the first conductive layer and the fourth conductive layer share one conductive layer.

10 . The semiconductor device according to claim 2 ,

wherein the second conductive layer and the sixth conductive layer share one conductive layer.

11 . The semiconductor device according to claim 2 ,

wherein the third conductive layer and the fourth conductive layer share one conductive layer.

12 . The semiconductor device according to claim 2 ,

wherein the second conductive layer and the fourth conductive layer share one conductive layer.

13 . The semiconductor device according to claim 7 ,

wherein the first conductive layer and the sixth conductive layer share one conductive layer.

14 . The semiconductor device according to claim 7 ,

wherein the first conductive layer and the fourth conductive layer share one conductive layer.

15 . A semiconductor device comprising:

a first transistor;

a second transistor; and

a first insulating layer,

a second insulating layer over the first insulating layer;

wherein the first transistor comprises a first semiconductor layer, a third insulating layer, a first conductive layer, a second conductive layer, and a third conductive layer,

wherein the second transistor comprises a second semiconductor layer, the second insulating layer, and the second conductive layer,

wherein the first insulating layer comprises a region in contact with a side surface of the first semiconductor layer and a first top surface of the first conductive layer,

wherein the first insulating layer, the second insulating layer, and the second conductive layer comprise an opening reaching the first conductive layer,

wherein the first semiconductor layer is in direct contact with a second top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer,

wherein the second conductive layer is positioned over the first insulating layer and the second insulating layer,

wherein the third conductive layer is positioned over the first semiconductor layer and comprises a region overlapping with the inner wall of the opening with the third insulating layer positioned between the third conductive layer and the first semiconductor layer,

wherein the second semiconductor layer is positioned over the first insulating layer, and

wherein the second conductive layer is positioned over the second semiconductor layer with the second insulating layer positioned between the second conductive layer and the second semiconductor layer.

16 . The semiconductor device according to claim 15 , further comprising a fourth conductive layer and a fifth conductive layer in contact with the second semiconductor layer.