IP Library Granted Patent US 12,713,774
Granted Patent B2
US 12,713,774 · App. 17/956,943 · Granted Aug 18, 2026

Display apparatus

Inventors: Jinyeong Kim (Yongin-si, KR); Jintaek Kim (Yongin-si, KR); Mijin Park (Yongin-si, KR); Taehoon Yang (Yongin-si, KR); Woonghee Jeong (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/122H10K59/121H10K59/30H10K59/1201H10K59/131H10K71/00
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Quick Facts
Patent No.
US 12,713,774
App. No.
17/956,943
Granted
Aug 18, 2026
Kind
B2
Abstract

A display apparatus includes a substrate having a first transmissive area, a second transmissive area, a pixel area between the first transmissive area and the second transmissive area, a first pixel electrode in the pixel area, a first intermediate layer disposed on the first pixel electrode to emit light of a first color and an insulating layer covering edges of the first pixel electrode and defining a first emission area through a first opening exposing a portion of the first pixel electrode. A first partition wall is disposed on the insulating layer between the first emission area and the first transmissive area. A second partition wall is disposed on the insulating layer between the first emission area and the second transmissive area. An opposite electrode is disposed on the first intermediate layer in the pixel area and partially contacts the first partition wall and the second partition wall.

Claims (68)

1 . A display apparatus comprising:

a substrate including a pixel area;

a thin film transistor disposed on the substrate in the pixel area;

a planarization layer disposed on the thin film transistor;

a first pixel electrode disposed on the planarization layer in the pixel area;

a second pixel electrode spaced apart from the first pixel electrode in a first direction in the pixel area on the planarization layer;

a first intermediate layer disposed on the first pixel electrode, the first intermediate layer emitting light of a first color;

an insulating layer disposed on the planarization layer, covering edges of the first pixel electrode and defining a first emission area through a first opening exposing a portion of the first pixel electrode and a second emission area through a second opening exposing a portion of the second pixel electrode;

a partition wall layer disposed on the insulating layer, and the partition wall layer comprising:

a first portion disposed on the insulating layer on a side of the first emission area; and

a second portion disposed on the insulating layer on the other side of the first emission area; and

an opposite electrode disposed on the first intermediate layer in the pixel area, at least a portion of the opposite electrode contacting the first portion and the second portion,

wherein the first portion includes a first inner side surface facing the first emission area, a first outer side surface located opposite to the first inner side surface, and a first top surface connecting the first inner side surface and the first outer side surface;

wherein the second portion includes a second inner side surface facing the first emission area, a second outer side surface located opposite to the second inner side surface, and a second top surface connecting the second inner side surface and the second outer side surface;

wherein the opposite electrode covers entire of the first inner side surface of the first portion and the second inner side surface of the second portion, covers at least a portion of the first top surface and the second top surface, and is at least partially disconnected on the first and second portions of the partition wall layer,

wherein the second portion disposed between the first emission area and the second emission area, and

a region between the first emission area and the second emission area includes a region having a height lower than heights of the first emission area and the second emission area from the substrate, and the opposite electrode is at least partially disconnected in the region having the lower height between the first emission area and the second emission area.

2 . The display apparatus of claim 1 ,

wherein in a plan view based on the substrate,

the partition wall layer is disposed to be spaced apart by a predetermined distance from the first emission area.

3 . The display apparatus of claim 2 ,

wherein in the plan view based on the substrate,

the first emission area has a substantially rectangular shape,

and the partition wall layer is discontinuously disposed along four sides of the first emission area.

4 . The display apparatus of claim 1 ,

wherein in a plan view based on the substrate,

the first emission area has a polygonal shape having at least four sides

the partition wall layer includes the first portion and the second portion, and further includes a third portion and a fourth portion respectively corresponding to at least four sides of the first emission area.

5 . The display apparatus of claim 1 , further comprising:

wherein the insulating layer covers edges of the second pixel electrode and defines a second emission area through a second opening exposing a portion of the second pixel electrode.

6 . The display apparatus of claim 5 , further comprising:

a first emission layer disposed on the first pixel electrode,

a second emission layer disposed on the second pixel electrode, and

wherein the first, and second emission layers emit different colors from each other.

7 . The display apparatus of claim 5 ,

wherein the partition wall layer further includes a third portion and a fourth portion, and

the third portion and the fourth portion are respectively disposed with the first emission area interposed therebetween.

8 . The display apparatus of claim 7 ,

wherein the first portion and the second portion have the same length, and the third portion and the fourth portion have the same length.

9 . The display apparatus of claim 8 ,

wherein the lengths of the first portion and the second portion are different from the lengths of the third portion and the fourth portion.

10 . The display apparatus of claim 7 , further comprising:

a third pixel electrode spaced apart from the first pixel electrode in a second direction intersecting with the first direction in the pixel area,

wherein the insulating layer covers edges of the third pixel electrode and defines a third emission area through a third opening exposing a portion of the third pixel electrode, and

the third portion disposed between the first emission area and the third emission area.

11 . The display apparatus of claim 7 , further comprising:

a fourth pixel electrode spaced apart from the first pixel electrode in a third direction intersecting with the first direction in the pixel area,

wherein the insulating layer covers edges of the fourth pixel electrode and defines a fourth emission area through a fourth opening exposing a portion of the fourth pixel electrode, and

the fourth portion disposed between the first emission area and the fourth emission area.

12 . The display apparatus of claim 11 , further comprising:

a fifth pixel electrode spaced apart from the first pixel electrode in the pixel area,

wherein the insulating layer covers edges of the fifth pixel electrode and defines a fifth emission area through a fifth opening exposing a portion of the fifth pixel electrode.

13 . The display apparatus of claim 12 ,

wherein the opposite electrode extends continuously between the first emission area and the fifth emission area.

14 . The display apparatus of claim 12 , further comprising:

a first emission layer disposed on the first pixel electrode,

a third emission layer disposed on the second pixel electrode, and

a fifth emission layer disposed on the third pixel electrode,

wherein the first, third, and fifth emission layers emit different colors from each other.

15 . The display apparatus of claim 4 ,

wherein the partition wall layer is at least partially removed between the first emission area and the second emission area.

16 . The display apparatus of claim 15 ,

wherein a region where at least a portion of the partition wall layer is removed has a lower step height than the region where the partition wall layer is present, based on an upper surface of the substrate.

17 . The display apparatus of claim 15

wherein the opposite electrode is disconnected corresponding to a region where at least a portion of the partition wall layer is removed.

18 . The display apparatus of claim 12 ,

wherein a first distance between the first emission area and the fifth emission area is greater than a second distance between the first emission area and the second emission area.

19 . The display apparatus of claim 5 , wherein a transmission region having a high transmittance is disposed between the first emission area and the second emission area.