IP Library Granted Patent US 12713882
Granted Patent B2
US 12713882 · App. 17/957,473 · Granted Aug 18, 2026

Semiconductor device including gate lines with a conductive layer having less nitrogen than an interface layer and method of fabricating the same

Inventors: Taekyung Yoon (Hwaseong-si, KR); Youngjun Kim (Suwon-si, KR); Hunyoung Bark (Suwon-si, KR); Eun-Ok Lee (Suwon-si, KR); Jaejin Lee (Goyang-si, KR); Dongju Chang (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H10W20/056H10P50/00H10P72/0432H10W20/048H10W20/074
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Quick Facts
Patent No.
US 12713882
App. No.
17/957,473
Granted
Aug 18, 2026
Kind
B2
Abstract

Provided is a method of fabricating a semiconductor device including forming a device isolation layer defining active regions on a substrate and forming gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming a trench crossing the active regions in the substrate, forming a conductive layer filling the trench, and performing a heat treatment process on the conductive layer. The conductive layer includes a nitride of a first metal. Nitrogen atoms in the conductive layer are diffused toward an outer surface and a lower surface of the conductive layer by the heat treatment process.

Claims (45)

1 . A method of fabricating a semiconductor device, the method comprising:

forming a device isolation layer defining active regions on a semiconductor substrate; and

forming gate lines intersecting the active regions and buried in the semiconductor substrate,

wherein the forming of the gate lines includes:

forming a trench intersecting the active regions in the semiconductor substrate;

forming a gate insulating pattern on a sidewall and a bottom surface of the trench;

forming a conductive layer completely filling the trench on the gate insulating pattern; and

performing a heat treatment process on the conductive layer,

wherein the conductive layer is a nitride of a first metal, and

wherein nitrogen atoms in the conductive layer are diffused toward an outer surface and a lower surface of the conductive layer by the heat treatment process.

2 . The method of claim 1 , wherein, after the heat treatment process, a concentration of nitrogen atoms in the conductive layer decreases from the outer surface and the lower surface of the conductive layer toward an inside of the conductive layer.

3 . The method of claim 1 , wherein a part of the conductive layer in which the nitrogen atoms are diffused forms a first interface layer,

wherein the first interface layer includes the nitride of the first metal, and

wherein a nitrogen concentration in the first interface layer is higher than a nitrogen concentration in the conductive layer.

4 . The method of claim 3 , wherein the first interface layer is formed adjacent to the outer surface and the lower surface of the conductive layer.

5 . The method of claim 3 , wherein, after the heat treatment process, other part of the conductive layer in which the nitrogen atoms are diffused forms a second interface layer, and

wherein the second interface layer is formed adjacent to an upper surface of the conductive layer.

6 . The method of claim 3 , wherein a flat band voltage of a material constituting the first interface layer is lower than a flat band voltage of a material constituting the conductive layer.

7 . The method of claim 3 , wherein a thickness of the first interface layer is from 5Å to 30Å.

8 . The method of claim 3 , further comprising etching the first interface layer and the conductive layer,

wherein an upper surface of the first interface layer and an upper surface of the conductive layer are formed to be positioned at the a same plane.

9 . The method of claim 1 , wherein the forming of the conductive layer includes reacting a first precursor material including the first metal and a second precursor material including nitrogen, and

wherein the forming of the conductive layer is performed at a process temperature of 550 degrees Celsius or more.

10 . The method of claim 1 , wherein the first metal includes molybdenum (Mo).

11 . The method of claim 1 , further comprising forming a capping layer on the gate lines.

12 . A method of fabricating a semiconductor device, the method comprising:

forming a device isolation layer defining active regions on a semiconductor substrate;

forming trenches intersecting the active regions;

forming a gate insulating pattern on a sidewall and a bottom surface of the trenches;

forming a conductive layer completely filling each of the trenches on the gate insulating pattern, and the conductive layer is a nitride of a first metal;

performing an etch back process to recess the conductive layer to fill a lower portion of each of the trenches;

forming a first interface layer adjacent to an outer surface and a lower surface of the conductive layer, the first interface layer including a nitride of the first metal; and

forming a capping layer filling an upper portion of each of the trenches,

wherein a nitrogen concentration in the first interface layer is higher than a nitrogen concentration in the conductive layer,

wherein the forming of the first interface layer includes

performing a heat treatment process on the conductive layer; and

diffusing nitrogen atoms in the conductive layer toward the outer surface and the lower surface of the conductive layer through the heat treatment process, to form the first interface layer.

13 . The method of claim 12 , wherein a part of the nitrogen atoms in the conductive layer are diffused toward an upper surface of the conductive layer through the heat treatment process, to form a second interface layer.

14 . The method of claim 12 , wherein the forming of the conductive layer includes reacting a first precursor material including the first metal and a second precursor material including nitrogen, and

wherein the forming of the conductive layer is performed at a process temperature of 550 degrees Celsius or more.

15 . The method of claim 12 , wherein a concentration of nitrogen atoms in the first interface layer decreases toward the conductive layer.

16 . The method of claim 12 , further comprising etching the first interface layer and the conductive layer,

wherein an upper surface of the first interface layer and an upper surface of the conductive layer are formed to be provided at a same plane.

17 . The method of claim 12 , wherein a thickness of the first interface layer is from 5Å to 30Å.

18 . The method of claim 12 , wherein the first metal includes molybdenum (Mo).