IP Library Granted Patent US 12713918
Granted Patent B2
US 12713918 · App. 17/952,111 · Granted Aug 18, 2026

Thermal test chip with stackable metal based heater and sensor

Inventors: Vinod Rai (San Jose, CA); Archana Venugopal (Mountain View, CA); Blake Travis (Richardson, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H10W40/70H10P74/203H10W20/40H10W20/498
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Quick Facts
Patent No.
US 12713918
App. No.
17/952,111
Granted
Aug 18, 2026
Kind
B2
Abstract

An electronic device includes a package structure, conductive leads partially exposed outside the package structure, and a semiconductor die having a semiconductor layer and a multilevel metallization structure, where the semiconductor die is enclosed by the package structure and the multilevel metallization structure includes a heater resistor, a sense resistor, and conductive metal features electrically coupled to respective terminals of the heater resistor and the sense resistor, with the conductive metal features electrically coupled to respective ones of the conductive leads.

Claims (45)

1 . An electronic device, comprising:

a package structure;

conductive leads partially exposed from the package structure; and

a semiconductor die having a semiconductor layer and a multilevel metallization structure, the semiconductor die enclosed by the package structure, the multilevel metallization structure including one or more first heater resistors, one or more first sense resistors, and conductive metal features electrically coupled to respective terminals of the one or more first heater resistors and the one or more first sense resistors, the conductive metal features electrically coupled to respective ones of the conductive leads, wherein all of the one or more first sense resistors are encircled by the one or more first heater resistors.

2 . The electronic device of claim 1 , wherein the multilevel metallization structure includes an array of unit regions arranged in rows along a first direction and columns along an orthogonal second direction, each unit region including an instance of the first heater resistor, and an instance of the first sense resistor.

3 . The electronic device of claim 2 , wherein:

the multilevel metallization structure includes a first metallization level over the semiconductor layer and a second metallization level over the first metallization level, the second metallization level spaced apart from the semiconductor layer along a third direction that is orthogonal to the first and second directions;

the first metallization level of each unit region includes an instance of the first heater resistor;

the second metallization level of each unit region includes an instance of a second heater resistor; and

the first metallization level of each unit region includes an instance of the first sense resistor.

4 . The electronic device of claim 3 , wherein the second metallization level of each unit region includes an instance of a second sense resistor.

5 . The electronic device of claim 3 , wherein the multilevel metallization structure includes a set of first series circuits including instances of the first heater resistor in respective unit regions, each respective first series circuit including a first pair of the conductive metal features electrically coupled to respective terminals of a respective instance of the first heater resistor of the respective first series circuit.

6 . The electronic device of claim 5 , wherein the multilevel metallization structure includes a set of second series circuits including instances of the second heater resistor in respective unit regions, each respective second series circuit including a second pair of conductive metal features electrically coupled to respective terminals of a respective instance of the second heater resistor of the respective second series circuit.

7 . The electronic device of claim 1 , wherein the multilevel metallization structure includes one or more second sense resistors.

8 . A method of fabricating an electronic device, the method comprising:

forming a first metallization level of a multilevel metallization structure above a semiconductor layer, the first metallization level including one or more first heater resistors;

forming a second metallization level of the multilevel metallization structure above the first metallization level, the second metallization level including one or more second heater resistors, and one of the first and second metallization levels including one or more first sense resistors;

electrically coupling the one or more first and second heater resistors and the one or more first sense resistors to conductive leads; and

enclosing the first and second metallization levels, the semiconductor layer, and portions of the conductive leads in a package structure, wherein all of the one or more first sense resistors are encircled by the one or more first heater resistors or the one or more second heater resistors.

9 . The method of claim 8 , wherein electrically coupling the one or more first and second heater resistors and the one or more first sense resistors to the conductive leads includes forming wire bonds between conductive metal features of the multilevel metallization structure and respective ones of the conductive leads.

10 . The method of claim 8 , wherein electrically coupling the one or more first and second heater resistors and the one or more first sense resistors to the conductive leads includes soldering conductive metal features of the multilevel metallization structure to respective ones of the conductive leads.

11 . The method of claim 8 , wherein forming the first and second metallization levels includes forming an array of unit regions arranged in rows along a first direction and columns along an orthogonal second direction, each unit region including an instance of the first heater resistor, an instance of the second heater resistor, and an instance of the first sense resistor.

12 . The method of claim 11 , wherein forming the first and second metallization levels includes forming a set of first series circuits including instances of the first heater resistor in respective unit regions, each respective first series circuit including a first pair of conductive metal features electrically coupled to respective terminals of a respective instance of the first heater resistor of the respective first series circuit.

13 . The method of claim 12 , wherein forming the first and second metallization levels includes forming a set of second series circuits including instances of the second heater resistor in respective unit regions, each respective second series circuit including a second pair of conductive metal features electrically coupled to respective terminals of a respective instance of the second heater resistor of the respective second series circuit.

14 . A system, comprising:

a circuit board;

an electronic device, including:

a package structure;

conductive leads partially exposed from the package structure and connected to conductive terminals of the circuit board; and

a semiconductor die having a semiconductor layer and a multilevel metallization structure, the semiconductor die enclosed by the package structure, the multilevel metallization structure including an array of unit regions arranged in rows along a first direction and columns along an orthogonal second direction, each unit region including a first heater resistor and a first sense resistor, and conductive metal features electrically coupled to respective terminals of the first heater resistor and the first sense resistor, the conductive metal features electrically coupled to respective ones of the conductive leads, wherein all of the first sense resistors are encircled by the first heater resistors;

a power circuit configured to provide current to activate selected ones of the first heater resistors;

a sensing circuit configured to sense a signal of selected ones of the first sense resistors; and

a switching circuit coupled to the circuit board, the power circuit, and the sensing circuit, the switching circuit configured to selectively couple the power circuit to the selected ones of the first heater resistors and to selectively couple the sensing circuit to the selected ones of the first sense resistors.

15 . The system of claim 14 , wherein:

the multilevel metallization structure includes a set of first series circuits including instances of the first heater resistor in respective unit regions, each respective first series circuit including a pair of the conductive metal features electrically coupled to respective terminals of a respective instance of the first heater resistor of the respective first series circuit; and

the switching circuit is configured to selectively couple the power circuit to one or more selected first series circuits to provide current to respective instances of the first heater resistor.

16 . The system of claim 15 , wherein:

the multilevel metallization structure includes a set of second series circuits including instances of a second heater resistor in respective unit regions, each respective second series circuit including a second pair of conductive metal features electrically coupled to respective terminals of a respective instance of the second heater resistor of the respective second series circuit; and

the switching circuit is configured to selectively couple the power circuit to one or more selected second series circuits to provide current to respective instances of the second heater resistor.

17 . A method, comprising:

connecting conductive leads of an electronic device to conductive terminals of a circuit board;

selectively coupling a power circuit to one or more first heater resistors in a multilevel metallization structure of a semiconductor die of the electronic device to provide current to activate the one or more first heater resistors; and

selectively coupling a sensing circuit to one or more first sense resistors in the multilevel metallization structure to sense a temperature of the electronic device, wherein all of the one or more first sense resistors are encircled by the one or more first heater resistors.

18 . The method of claim 17 , wherein:

the multilevel metallization structure includes an array of unit regions arranged in rows along a first direction and columns along an orthogonal second direction, each unit region including an instance of the first heater resistor, and an instance of the first sense resistor.