IP Library Granted Patent US 12713924
Granted Patent B2
US 12713924 · App. 17/891,704 · Granted Aug 18, 2026

Device, method, and system to protect through-dielectric vias of a composite chiplet

Inventors: Adel Elsherbini (Chandler, AZ); Mohammad Enamul Kabir (Portland, OR); Johanna Swan (Scottsdale, AZ); Omkar Karhade (Chandler, AZ); Kimin Jun (Portland, OR); Feras Eid (Chandler, AZ); Shawna Liff (Scottsdale, AZ); Xavier Brun (Hillsboro, OR); Bhaskar Jyoti Krishnatreya (Hillsboro, OR); Tushar Talukdar (Wilsonville, OR); Haris Khan Niazi (Scottsdale, AZ)
Assignee: Intel Corporation
H10W42/00H10W70/09H10W74/01H10W74/111H10W74/43H10W90/00H10W70/60H10W72/853H10W72/874H10W90/22H10W90/724H10W90/792
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Quick Facts
Patent No.
US 12713924
App. No.
17/891,704
Filed
Aug 19, 2022
Granted
Aug 18, 2026
Kind
B2
Art Unit
2811
USPC
257/774
Abstract

Techniques and mechanisms to mitigate corrosion to via structures of a composite chiplet. In an embodiment, a composite chiplet comprises multiple integrated circuit (IC) components which are each in a different respective one of multiple levels. One or more conductive vias extend through an insulator layer in a first level of the multiple levels. An annular structure of the composite chiplet extends vertically through the insulator layer, and surrounds the one or more conductive vias in the insulator layer. The annular structure mitigates an exposure of the one or more conductive vias to moisture which is in a region of the insulator layer that is not surrounded by the annular structure. In another embodiment, the annular structure further surrounds an IC component which extends in the insulator layer.

Claims (60)

1 . A device comprising:

a first tile which extends vertically through a first level;

a second tile which extends vertically through a second level which is over the first level;

a first layer of a first insulator material which extends vertically between the first level and the second level;

a second layer of a second insulator material which extends vertically through the second level;

a first plurality of conductive vias which each extend through the first layer in a region under the second tile, the first plurality of conductive vias each electrically coupled to respective integrated circuitry of the second tile; and

a first annular structure which extends through the first layer and which surrounds the first plurality of conductive vias in the first layer;

wherein:

the first tile is electrically coupled to a circuit structure which is disposed in the second layer;

respective first ends of the first plurality of conductive vias are each at a top of the first layer;

respective second ends of the first plurality of conductive vias are each at a bottom of the first layer;

the first annular structure forms a barrier which is contiguous both around the first plurality of conductive vias, and from the top of the first layer to the bottom of the first layer, wherein a first contiguous portion of the first insulator material is separated by the barrier from a second contiguous portion of the first insulator material;

the first contiguous portion extends around and adjoins an exterior sidewall of the first annular structure;

the second contiguous portion adjoins an interior sidewall of the first annular structure, wherein the second contiguous portion further adjoins and extends around each of the first plurality of conductive vias; and

one of the first contiguous portion or the second contiguous portion further extends around and adjoins the first tile.

2 . The device of claim 1 , further comprising:

a second plurality of conductive vias which each extend through the second layer, the second plurality of conductive vias each coupled to respective circuitry of the first level; and

a second annular structure which extends through the second layer and which surrounds the second plurality of conductive vias in the second layer, wherein the second annular structure is to resist a transmission of moisture from the second layer.

3 . The device of claim 1 , further comprising:

a second plurality of conductive vias which each extend through the first layer, the second plurality of conductive vias each coupled to respective circuitry of the second level; and

a second annular structure which extends through the first layer and which surrounds the second plurality of conductive vias in the first layer, wherein the second annular structure is to resist moisture from the first layer.

4 . The device of claim 1 , wherein the first annular structure further surrounds the first tile in the first layer.

5 . The device of claim 4 , wherein the first annular structure surrounds all circuit structures which extend in the first layer.

6 . The device of claim 1 , further comprising:

a first patterned layer at a first side of the first layer; and

a second patterned layer at a second side of the first layer, wherein the second side is opposite the first side;

wherein the first patterned layer and the second patterned layer each comprise a respective non-metallic material to resist an absorption of moisture by the first layer.

7 . The device of claim 6 , further comprising:

a barrier structure which extends along a sidewall of the first tile to one of the first patterned layer or the second patterned layer, wherein the barrier structure comprises a respective non-metallic material.

8 . The device of claim 1 , wherein the first annular structure comprises a metal.

9 . The device of claim 1 , wherein the first layer comprises an oxide, and wherein the first annular structure comprises a nitride.

10 . The device of claim 9 , wherein the first annular structure comprises multiple layers each of a different respective non-metallic material.

11 . A system comprising:

a microprocessor; and

a memory coupled to the microprocessor, wherein at least one of the memory or the microprocessor comprises:

a first tile which extends vertically through a first level;

a second tile which extends vertically through a second level which is over the first level;

a first layer of a first insulator material which extends vertically between the first level and the second level;

a second layer of a second insulator material which extends vertically through the second level;

a first plurality of conductive vias which each extend through the first layer in a region under the second tile, the first plurality of conductive vias each electrically coupled to respective integrated circuitry of the second tile; and

a first annular structure which extends through the first layer and which surrounds the first plurality of conductive vias in the first layer;

wherein:

the first tile is electrically coupled to a circuit structure which is disposed in the second layer;

respective first ends of the first plurality of conductive vias are each at a top of the first layer;

respective second ends of the first plurality of conductive vias are each at a bottom of the first layer;

the first annular structure forms a barrier which is contiguous both around the first plurality of conductive vias, and from the top of the first layer to the bottom of the first layer, wherein a first contiguous portion of the first insulator material is separated by the barrier from a second contiguous portion of the first insulator material;

the first contiguous portion extends around and adjoins an exterior sidewall of the first annular structure;

the second contiguous portion adjoins an interior sidewall of the first annular structure, wherein the second contiguous portion further adjoins and extends around each of the first plurality of conductive vias; and

one of the first contiguous portion or the second contiguous portion further extends around and adjoins the first tile.

12 . The system of claim 11 , wherein the tile further comprises:

a second plurality of conductive vias which each extend through the second layer, the second plurality of conductive vias each coupled to respective circuitry of the first level; and

a second annular structure which extends through the second layer and which surrounds the second plurality of conductive vias in the second layer, wherein the second annular structure is to resist a transmission of moisture from the second layer.

13 . The system of claim 11 , wherein the tile further comprises:

a second plurality of conductive vias which each extend through the first layer, the second plurality of conductive vias each coupled to respective circuitry of the second level; and

a second annular structure which extends through the first layer and which surrounds the second plurality of conductive vias in the first layer, wherein the second annular structure is to resist moisture from the first layer.

14 . The system of claim 11 , wherein the tile further comprises:

a first patterned layer at a first side of the first layer; and

a second patterned layer at a second side of the first layer, wherein the second side is opposite the first side;

wherein the first patterned layer and the second patterned layer each comprise a respective non-metallic material to resist an absorption of moisture by the first layer.

15 . The system of claim 11 , wherein the first layer comprises an oxide, and wherein the first annular structure comprises a nitride.