IP Library Granted Patent US 12713966
Granted Patent B2
US 12713966 · App. 18/098,833 · Granted Aug 18, 2026

Electronic devices and methods of manufacturing electronic devices

Inventors: Jong Min Bark (Gwangju, KR); Sang Hyoun Lee (Incheon, KR); Hun Jung Lim (Sejong-si, KR); Hyun Il Moon (Gyeonggi-do, KR)
Assignee: Amkor Technology Singapore Holding Pte. Ltd
H10W74/117H10P72/74H10W70/614H10W74/016H10P72/7416H10P72/7424
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12713966
App. No.
18/098,833
Granted
Aug 18, 2026
Kind
B2
Abstract

In one example, an electronic device includes a substrate including a substrate upper side and a conductive structure comprising substrate upper terminals adjacent to the substrate upper side. Vertical interconnects are coupled to the substrate upper terminals. An encapsulant covers portions of the substrate and the vertical interconnects. The vertical interconnects are exposed from an upper side of the encapsulant. A redistribution structure is over the encapsulant and includes a redistribution structure upper side, a redistribution structure lower side, a redistribution dielectric structure, and a redistribution conductive structure. The redistribution structure includes redistribution upper terminals adjacent to the redistribution structure upper side and redistribution bottom terminals adjacent to the redistribution lower side. The redistribution bottom terminals are coupled to the vertical interconnects and the redistribution upper terminals. An electronic component is coupled to the redistribution upper terminals. Other examples and related methods are also disclosed herein.

Claims (148)

1 . An electronic device, comprising:

a base substrate comprising:

a base substrate top side;

a base substrate bottom side opposite to the base substrate top side;

base substrate sidewalls;

a base dielectric structure; and

a base conductive structure comprising substrate top terminals adjacent to the base substrate top side;

wherein:

the base dielectric structure comprises a top base dielectric that defines the base substrate top side and comprises openings that expose the substrate top terminals;

the substrate top terminals are recessed below the base substrate top side; and

the substrate top terminals comprise a first width;

vertical interconnects comprising proximate ends coupled to the substrate top terminals within the openings and distal ends opposite to the proximate ends, wherein the proximate ends each comprise a first diameter that is less than the first width;

a substrate encapsulant covering portions of the base substrate top side and the vertical interconnects and comprising a substrate encapsulant top side, wherein the distal ends of the vertical interconnects are exposed from the substrate encapsulant top side;

a redistribution structure over the substrate encapsulant and comprising:

a redistribution structure top side;

a redistribution structure bottom side opposite to the redistribution structure top side;

a redistribution dielectric structure comprising a first dielectric over the substrate encapsulant top side and comprising first openings exposing the distal ends of the vertical interconnects; and

a redistribution conductive structure positioned within the redistribution dielectric structure and comprising:

redistribution bottom terminals adjacent to the redistribution structure bottom side and coupled to the vertical interconnects through the first openings; and

redistribution top terminals adjacent to the redistribution structure top side; and

a first electronic component coupled to the redistribution top terminals at the redistribution structure top side.

2 . The electronic device of claim 1 , further comprising:

an encapsulant covering at least portions of the first electronic component and portions of the redistribution structure;

wherein:

the substrate top terminals comprise upper sides; and

the top base dielectric overlaps onto the upper sides of the substrate top terminals.

3 . The electronic device of claim 2 , wherein:

the first electronic component comprises a first side proximate to the redistribution structure and a second side opposite to the first side; and

the second side is exposed from the encapsulant.

4 . The electronic device of claim 3 , further comprising:

a thermal interface material (TIM) over the second side of the first electronic component; and

a cover over the encapsulant and coupled to the TIM.

5 . The electronic device of claim 1 , wherein:

the vertical interconnects comprise wire bonded conductive wires comprising:

interconnect heads coupled to the substrate top terminals and each comprising the first diameter; and

interconnect tails coupled to the interconnect heads and each comprising a second diameter less than the first diameter, wherein the wire bonded conductive wires comprise an overall height.

6 . The electronic device of claim 5 , wherein:

the interconnect heads are connected to the substrate top terminals within the openings of the top base dielectric at a location below the base substrate top side;

the first diameter is between 20 microns and 40 microns;

the second diameter is between 13 microns and 30 microns;

the overall height is between 200 microns and 500 microns;

the substrate top terminals comprise a first pitch between adjacent substrate top terminals;

the redistribution top terminals comprise a second pitch between adjacent redistribution top terminals; and

the second pitch is less than the first pitch.

7 . The electronic device of claim 1 , wherein:

the substrate encapsulant covers the base substrate sidewalls.

8 . The electronic device of claim 1 , wherein:

the distal ends of the vertical interconnects are substantially coplanar with the substrate encapsulant top side.

9 . The electronic device of claim 1 , wherein:

the distal ends of the vertical interconnects are recessed below the substrate encapsulant top side; and

the redistribution bottom terminals contact the distal ends of the vertical interconnects below the substrate encapsulant top side.

10 . The electronic device of claim 1 , further comprising:

an encapsulant covering the base substrate sidewalls without extending to overlap the base substrate top side;

wherein:

the substrate encapsulant covers the base substrate top side and comprises substrate encapsulant sidewalls that are coplanar with the base substrate sidewalls; and

the encapsulant covers the substrate encapsulant sidewalls.

11 . An electronic device, comprising:

a base substrate comprising:

a base substrate upper side;

a base substrate lower side opposite to the base substrate upper side;

base substrate sidewalls; and

a base conductive structure comprising substrate upper terminals adjacent to the base substrate upper side, wherein the substrate upper terminals comprise a first width;

vertical interconnects comprising first ends coupled to the substrate upper terminals and second ends opposite to the first ends, wherein the first ends comprise a first diameter less than the first width;

a substrate encapsulant covering portions of the base substrate upper side and the vertical interconnects, wherein:

the substrate encapsulant comprises a substrate encapsulant upper side; and

the second ends of the vertical interconnects are exposed from the substrate encapsulant upper side;

a redistribution structure over the substrate encapsulant and comprising:

a redistribution structure upper side;

a redistribution structure lower side opposite to the redistribution structure upper side;

a redistribution dielectric structure; and

a redistribution conductive structure comprising redistribution upper terminals adjacent to the redistribution structure upper side, and redistribution lower terminals adjacent to the redistribution structure lower side and coupled to the vertical interconnects and the redistribution upper terminals;

a first electronic component coupled to the redistribution upper terminals adjacent to the redistribution structure upper side; and

an encapsulant covering the base substrate sidewalls without extending to overlap the base substrate upper side;

wherein:

the vertical interconnects comprise wire bonded conductive wires comprising:

interconnect heads coupled to the substrate upper terminals and each comprising the first diameter, which is a maximum diameter for each of the vertical interconnects; and

interconnect tails coupled to the interconnect heads and each comprising a second diameter less than the first diameter, wherein the wire bonded conductive wires comprise an overall height;

the substrate encapsulant covers the base substrate upper side and comprises substrate encapsulant sidewalls that are coplanar with the base substrate sidewalls;

the encapsulant covers the substrate encapsulant sidewalls;

the redistribution dielectric structure comprises a bottom dielectric adjacent to the substrate encapsulant upper side;

the bottom dielectric comprises bottom dielectric openings exposing the vertical interconnects; and

the redistribution lower terminals connect to the vertical interconnects through the bottom dielectric openings.

12 . The electronic device of claim 11 , wherein:

the wire bonded conductive wires are characterized by an overall height to second diameter ratio between 6 to 1 and 33 to 1;

the interconnect heads comprise a first pitch between adjacent interconnect heads;

the redistribution upper terminals comprise a second pitch between adjacent redistribution upper terminals that is less than the first pitch; and

the first pitch is less than 90 microns.

13 . The electronic device of claim 11 , further comprising:

a cover over the first electronic component and the redistribution structure.

14 . The electronic device of claim 13 , wherein:

the cover is electrically coupled to one or more of the redistribution conductive structure or the base conductive structure.

15 . The electronic device of claim 13 , further comprising:

a second encapsulant between the cover and the redistribution structure.

16 . A method of manufacturing an electronic device, comprising:

providing a substrate assembly comprising:

a base substrate comprising:

a base substrate top side;

a base substrate bottom side opposite to the base substrate top side;

base substrate sidewalls;

a base dielectric structure; and

a base conductive structure comprising substrate top terminals adjacent to the base substrate top side, wherein the base dielectric structure comprises a top base dielectric that defines the base substrate top side and comprises openings that expose the substrate top terminals, and wherein the substrate top terminals are recessed below the base substrate top side, and wherein the substrate top terminals comprise a first width;

vertical interconnects comprising first ends coupled to the substrate top terminals within the openings and second ends opposite to the first ends, wherein the first ends comprise a first diameter less than the first width;

a substrate encapsulant covering portions of the base substrate top side and the vertical interconnects, wherein:

the substrate encapsulant comprises a substrate encapsulant top side; and the second ends of the vertical interconnects are exposed from the substrate encapsulant top side; and

a redistribution structure over the substrate encapsulant and comprising:

a redistribution structure top side;

a redistribution structure bottom side opposite to the redistribution structure top side;

a redistribution dielectric structure comprising a first dielectric over the substrate encapsulant top side and comprising first openings exposing the second ends of the vertical interconnects; and

a redistribution conductive structure positioned within the redistribution dielectric structure and comprising:

redistribution bottom terminals adjacent to the redistribution structure bottom side and coupled to the vertical interconnects through the first openings; and

redistribution top terminals adjacent to the redistribution structure top side; and

coupling a first electronic component to the redistribution top terminals at the redistribution structure top side.

17 . The method of claim 16 , wherein:

providing the substrate assembly comprises:

providing the base substrate as one of a plurality of base substrates comprising base substrate top sides and the substrate top terminals;

wire bonding conductive wires to the substrate top terminals to provide the vertical interconnects, wherein the conductive wires comprise interconnect heads coupled to the substrate top terminals and each comprising the first diameter and interconnect tails coupled to the interconnect heads and each comprising a second diameter less than the first diameter;

forming the substrate encapsulant over the base substrate top sides and the conductive wires;

removing a portion of the substrate encapsulant to provide the substrate encapsulant top side and to expose the interconnect tails from the substrate encapsulant top side; and

forming the redistribution structure over the substrate encapsulant;

coupling the first electronic component comprises:

providing the first electronic component as one of a plurality of electronic components; and

coupling the plurality of electronic components including the first electronic component to the redistribution top terminals; and

the method further comprises singulating the substrate assembly through the redistribution structure and the substrate encapsulant.

18 . The method of claim 16 , wherein:

providing the substrate assembly comprises:

providing the base substrate as one of a plurality of base substrates, each of the plurality of base substrates comprising base substrate top sides, the substrate top terminals, and the base substrate sidewalls;

coupling the plurality of base substrates to a carrier, wherein the plurality of base substrates are laterally spaced apart on the carrier;

wire bonding conductive wires to the substrate top terminals to provide the vertical interconnects, wherein the conductive wires comprise interconnect heads coupled to the substrate top terminals and each comprising the first diameter and interconnect tails coupled to the interconnect heads and each comprising a second diameter less than the first diameter;

forming the substrate encapsulant over the base substrate top sides, the vertical interconnects, and the base substrate sidewalls;

removing a portion of the substrate encapsulant to provide the substrate encapsulant top side and to expose the interconnect tails from the substrate encapsulant top side; and

forming the redistribution structure over the substrate encapsulant;

coupling the first electronic component comprises:

providing the first electronic component as one of a plurality of electronic components; and

coupling the plurality of electronic components including the first electronic component to the redistribution top terminals; and

the method further comprises singulating the substrate assembly through the redistribution structure and the substrate encapsulant.

19 . The method of claim 16 , wherein:

providing the substrate assembly comprises:

providing the base substrate as one of a plurality of base substrates comprising base substrate top sides and the substrate top terminals;

wire bonding conductive wires to the substrate top terminals to provide the vertical interconnects, wherein the conductive wires comprise interconnect heads coupled to the substrate top terminals and each comprising the first diameter and interconnect tails coupled to the interconnect heads and each comprising a second diameter less than the first diameter;

forming the substrate encapsulant over the base substrate top sides and the vertical interconnects;

singulating the substrate encapsulant and the plurality of base substrates to provide the substrate encapsulant with substrate encapsulant sidewalls and each base substrate with the base substrate sidewalls;

providing an encapsulant over the substrate encapsulant including the substrate encapsulant sidewalls and the base substrate sidewalls;

removing the encapsulant above the substrate encapsulant and a portion of the substrate encapsulant to provide the substrate encapsulant top side and to expose the interconnect tails from the substrate encapsulant top side, wherein at least a portion of the encapsulant remains over the substrate encapsulant sidewalls; and

forming the redistribution structure over the substrate encapsulant;

coupling the first electronic component comprises:

providing the first electronic component as one of a plurality of electronic components; and

coupling the plurality of electronic components including the first electronic component to the redistribution top terminals; and

the method further comprises singulating the substrate assembly through the redistribution structure and the encapsulant.