Fan-out wafer-level packaging structure and method for manufacturing same
A fan-out wafer-level packaging structure and a method for manufacturing it are disclosed. The structure includes: a rewiring layer, a chip, an electrical component, a protective layer made of UV-curable adhesive, a molding layer, and a solder ball. The protective layer is disposed on surfaces of the electrical component, sealing the electrical component, and ensuring its safe operation and reliability, mitigating risks of melting and spillage of solder in the electrical component, and preventing electrical shorts and delamination between molding layers and the electrical component. The protective layer is formed by UV-curing or UV/thermal-dual-curing, to prevent loss of upper portions of the adhesive resulted from the upper portions flowing downward after dispensing. A dual-curing process can further solidify the protective layer, enabling the protective layer to better seal and protect the electrical component.
1 . A method for manufacturing a fan-out wafer-level packaging structure, comprising:
1) Forming a rewiring layer over a support substrate;
2) soldering a bonding surface of an electrical component to a first surface of the rewiring layer, dispensing ultraviolet light-curable (UV-curable) adhesive on surfaces of the electrical component, and irradiating the UV-curable adhesive with ultraviolet (UV) light, wherein the UV-curable adhesive solidifies in the UV light and forms a protective layer;
3) Soldering a chip to the first surface of the rewiring layer, next to the electrical component, and forming a molding layer encapsulating the chip, the electrical component, and the protective layer, wherein heat generated during formation of the molding layer further heats and solidifies the protective layer,
wherein when the protective layer made of UV-curable adhesive is solidified, the protective layer is disposed on a top surface and side surfaces of the electrical component, and wherein the top surface of the electrical component is opposite to the bonding surface of the electrical component; and
4) Removing the support substrate, and disposing a solder ball on a second surface of the rewiring layer.
2 . The method for manufacturing the fan-out wafer-level packaging structure according to claim 1 , wherein the electrical component comprises one or more of an active component and a passive component.
3 . The method for manufacturing the fan-out wafer-level packaging structure according to claim 2 , wherein the active component comprises one or more of a power management chip, an emitter chip, and a receiver chip, and wherein the passive component comprises one or more of a capacitive component, an inductive component, and a resistive component.
4 . The method for manufacturing the fan-out wafer-level packaging structure according to claim 1 , wherein a glass transition temperature of the UV-curable adhesive is greater than or equal to 200° C.
5 . The method for manufacturing the fan-out wafer-level packaging structure according to claim 1 , wherein the rewiring layer comprises a dielectric layer and a wiring metal layer disposed in the dielectric layer, wherein the chip is electrically connected to the wiring metal layer, and wherein the bonding surface of the electrical component is electrically connected to the wiring metal layer.
6 . The method for manufacturing the fan-out wafer-level packaging structure according to claim 1 , wherein a material of the molding layer comprises one of epoxy resin, resin, and plasticizable polymer, and wherein a technique for manufacturing the molding layer comprises one of compression molding, transfer molding, liquid seal molding, mold bottom filling, capillary bottom filling, vacuum lamination, and spin coating.