Granted Patent
Utility
US 6,518,161 · App. 09/801,007
Method for manufacturing a dual chip in package with a flip chip die mounted on a wire bonded die
Inventors:
Sarathy Rajagopalan, Kishor Desai
Patented Case
View Patent ↗
Granted: Feb 11, 2003
Filed: Mar 7, 2001
Inventors
Sarathy Rajagopalan
Kishor Desai
Assignee (at issue)
LSI Logic Corporation
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.