Method of fabricating a semiconductor assembly including chip scale package and second substrate with exposed substrate surfaces on upper and lower sides
View Patent ↗A semiconductor multi-package module has stacked lower and upper packages, each package including a die attached to a substrate, in which the upper and lower substrates are interconnected by wire bonding, and in which the upper package is inverted. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate in inverted orientation onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
1. A method for making a multipackage module, comprising:
providing a first package including at least one die on a first package substrate,
placing over the first package an inverted second package including at least one die on a second package substrate, and
forming wire bond z-interconnects between the first and second substrates.
2. The method of claim 1 wherein providing the first package comprises providing an unsingulated strip of packages.
3. The method of claim 1 wherein placing the inverted second package over the first package comprises applying an adhesive onto an upper surface of the first substrate and inverting and placing the second package onto the adhesive.
4. The method of claim 3 wherein the adhesive is a curable adhesive, and further comprising curing the adhesive.
5. The method of claim 1 wherein providing the first package comprises testing packages for a performance and reliability requirement and selecting the first package as meeting the requirement.
6. The method of claim 1 wherein placing the second package over the first package comprises testing packages for a performance and reliability requirement and selecting the second package as meeting the requirement.
7. The method of claim 1 , further comprising attaching second level interconnect balls onto the first package substrate.
8. The method of claim 1 , further comprising encapsulating the stacked packages in a multi-package module molding.