High K stack for non-volatile memory

1. A structure for use in a semiconductor device, comprising:

a substrate;

source, drain and channel regions formed within the substrate;

a first oxide layer having a first dielectric constant formed over the source, drain, and channel regions of the substrate;

a charge storage layer formed upon the first oxide layer,

wherein the charge storage layer is configured to store two bits of information;

a second oxide layer formed upon the charge storage layer and having a thickness ranging from about 30 Å to about 100 Å;

a single layer comprising one dielectric material formed directly on the second oxide layer, the one dielectric material having a second dielectric constant greater than the first dielectric constant and where the second dielectric constant is greater than 7.0,

wherein the one dielectric material comprises hafnium aluminate, and

wherein a thickness of the single layer comprising the one dielectric material ranges from about 40 Å to about 200 Å; and

a gate electrode formed directly upon the single layer comprising one dielectric material.

2. The structure of claim 1 , wherein the charge storage layer comprises a nitride.

3. The structure of claim 1 , wherein the substrate comprises silicon.

4. The structure of claim 1 , wherein the second oxide layer comprises one of silicon oxide or silicon oxynitride.

5. A memory device, comprising:

a source region and a drain region formed in a substrate;

a channel region formed in the substrate between the source and drain regions;

a first oxide layer formed over the channel region, the first oxide layer having a first dielectric constant;

a charge storage layer formed upon the first oxide layer,

wherein the charge storage layer is configured to store two bits of information;

a second oxide layer formed upon the charge storage layer and having a thickness ranging from about 30 Å to about 100 Å;

a single layer comprising one dielectric material formed directly upon the second oxide layer, the one dielectric material having a second dielectric constant that is greater than the first dielectric constant, where the second dielectric constant is greater than 7.0,

wherein the one dielectric material comprises hafnium aluminate,

wherein a thickness of the single layer comprising one dielectric material ranges from about 40 Å to about 200 Å; and

a gate electrode formed upon the single layer comprising one dielectric material.

6. The memory device of claim 5 , wherein the second oxide layer comprises one of silicon oxide or silicon oxynitride.

7. The memory device of claim 5 , wherein the combined thickness of the second oxide layer and the single layer comprising one dielectric material ranges from about 70 Å to about 300 Å.

8. A structure for use in a semiconductor device, comprising:

a first oxide layer having a first dielectric constant;

a charge storage layer formed upon the first oxide layer;

a second oxide layer formed upon the charge storage layer and having a thickness ranging from about 30 Å to about 100 Å;

a single layer comprising one dielectric material formed directly on the second oxide layer, the one dielectric material having a second dielectric constant greater than the first dielectric constant and where the one dielectric material comprises hafnium aluminate,

wherein a thickness of the single layer comprising one dielectric material ranges from about 40 Å to about 200 Å; and

a gate electrode formed directly upon the single layer.