IP Library Granted Patent US 7,631,422
Granted Patent B2
US 7,631,422 · App. 11/440,113 · Granted Dec 15, 2009

Method of manufacturing wiring substrate having terminated buses

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Quick Facts
Patent No.
US 7,631,422
App. No.
11/440,113
Filed
May 25, 2006
Granted
Dec 15, 2009
Kind
B2
Art Unit
3729
USPC
29/830
Abstract

A terminal resistor is provided at the end of a bus formed on a wiring substrate. An insulator having a large dielectric loss angle is provided in the vicinity of the terminal resistor to absorb high frequency electromagnetic waves in the vicinity. This arrangement permits successful transmission of digital signals in the GHz region using a conventional terminal resistor.

Claims (7)

1. A method of manufacturing a wiring substrate, comprising steps of:

preparing an insulative substrate having thereon a stacked pair of parallel transmission lines;

mounting and connecting a terminal chip resistor with the terminal ends of said stacked pair of parallel transmission lines, said terminal chip resistor having a resistance that matches the characteristic impedance of said stacked pair of parallel transmission lines to minimize the reflection of waves in said stacked pair of parallel transmission lines;

preparing a sticky organic potting resin solution having a larger dielectric loss angle than said insulative substrate at least in the frequency range of digital signals to be transmitted by said stacked pair of parallel transmission lines;

dropping said sticky organic potting resin solution onto said terminal chip resistor and the vicinity thereof for potting; and

hardening said organic potting resin;

wherein said sticky organic potting resin solution includes a thermosetting organic material containing a hydroxyl radical.