IP Library › Granted Patent US 7,781,261
Granted Patent B2
US 7,781,261 · App. 11/954,613 · Granted Aug 24, 2010

Integrated circuit package system with offset stacking and anti-flash structure

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Quick Facts
Patent No.
US 7,781,261
App. No.
11/954,613
Filed
Dec 12, 2007
Granted
Aug 24, 2010
Kind
B2
Art Unit
2813
USPC
438/106
Abstract

An integrated circuit package system includes: mounting a device structure in an offset location over a carrier with the device structure having a bond pad and a contact pad; connecting an electrical interconnect between the bond pad and the carrier; forming an anti-flash structure over the device structure with the anti-flash structure exposing the contact pad; and forming a package encapsulation adjacent to the anti-flash structure and over the carrier.

Claims (23)

1. A method of manufacturing an integrated circuit package system comprising:

mounting a device structure in an offset location over a carrier with the device structure having a bond pad and a contact pad;

connecting an electrical interconnect between the bond pad and the carrier;

forming an anti-flash structure over the device structure with the anti-flash structure exposing the contact pad; and

forming a package encapsulation adjacent to the anti-flash structure and over the carrier by a planar mold chase on the anti-flash structure.

2. The method as claimed in claim 1 wherein mounting the device structure includes mounting an interposer.

3. The method as claimed in claim 1 wherein mounting the device structure includes mounting an integrated circuit device.

4. The method as claimed in claim 1 wherein forming the anti-flash structure over the device structure includes forming the anti-flash structure over a portion of the electrical interconnect over the bond pad.

5. The method as claimed in claim 1 further comprising mounting a first integrated circuit device over the carrier.

6. A method of manufacturing an integrated circuit package system comprising:

mounting a device structure in an offset location over a carrier with the device structure having a bond pad and a contact pad;

mounting an integrated circuit device over the carrier;

mounting a passive device over the carrier;

connecting an electrical interconnect between the bond pad and the carrier;

forming an anti-flash structure on the device structure with the anti-flash structure exposing the contact pad; and

forming a package encapsulation adjacent to the anti-flash structure and over the carrier by a planar mold chase on the anti-flash structure.

7. The method as claimed in claim 6 further comprising:

mounting an integrated circuit die over the carrier; and

wherein mounting the device structure over the carrier includes:

mounting the device structure over the integrated circuit die.

8. The method as claimed in claim 6 wherein forming the anti-flash structure over the device structure includes forming the anti-flash structure over a side of the device structure onto the carrier.

9. The method as claimed in claim 6 wherein mounting the device structure in the offset location over the carrier includes mounting the device structure with a side of the device structure not parallel to an edge of the carrier.

10. The method as claimed in claim 6 further comprising mounting a mounting device over the device structure within the anti-flash structure.