Semiconductor integrated circuit device and a method of manufacturing the same
View Patent ↗Manufacturing technique for an IC device which includes forming the first conductor film over a memory cell forming region and over a peripheral circuit forming region of a semiconductor substrate, patterning the first conductive film lying over the memory cell forming region to form a first conductive pattern which serves as a first or control gate electrode of a memory cell and leaving the first conductive film over the peripheral circuit forming region, forming a second conductive film over both the memory cell forming region and the first conductive film in the peripheral circuit forming region, etching the second conductive film to form a second or memory gate electrode of the memory cell on at least a side wall of the first conductive pattern, and followed by the formation of a gate electrode of a peripheral circuit transistor by etching the first conductive film in the peripheral circuit forming region.
1. A manufacturing method of a semiconductor integrated circuit device comprising a nonvolatile memory cell transistor having a control gate electrode and a memory gate electrode, comprising steps of:
(a) forming a first gate insulating film over a semiconductor substrate;
(b) after the step (a), forming the control gate electrode over the first gate insulating film;
(c) after the step (b), forming a second gate insulating film over the semiconductor substrate, side surface of the control gate electrode and top surface of the control gate electrode, wherein the second gate insulating includes a charge storage film;
(d) after the step (c), depositing a conductive film over the second gate insulating film;
(e) after the step (d), forming a mask layer in order to cover a part of the conductive film;
(f) after the step (e), dry etching the conductive film by using the mask layer, thereby the conductive film not covered with the mask layer is processed to form a side spacer-like shaped said memory gate electrode on a side wall of the control gate electrode through the second gate insulating film and the conductive film covered with the mask layer is patterned to a contact region of the memory gate electrode;
(g) after the step (f), removing the mask layer;
(h) after the step (g), forming an interlayer insulating film over the control gate electrode and the memory gate electrode;
(i) after the step (h), forming a hole in the interlayer insulating film in order to connect with the contact region of the memory gate electrode; and
(j) after the step (i), forming a plug in the hole.
2. A manufacturing method of a semiconductor integrated circuit device according to the claim 1 ,
wherein the memory gate electrode includes a polysilicon film.
3. A manufacturing method of a semiconductor integrated circuit device according to the claim 2 , further comprising the step of, between the step (g) and (h), forming a silicide film on the polysilicon film.
4. A manufacturing method of a semiconductor integrated circuit device according to the claim 3 ,
wherein the silicide film is formed of a cobalt silicide.
5. A manufacturing method of a semiconductor integrated circuit device according to the claim 1 ,
wherein the charge storage film is formed of a silicon nitride.
6. A manufacturing method of a semiconductor integrated circuit device according to the claim 1 ,
wherein the mask layer is a resist film.
7. A manufacturing method of a semiconductor integrated circuit device according to the claim 1 ,
wherein the hole is not formed on the side spacer-like memory gate electrode.
8. A manufacturing method of a semiconductor integrated circuit device comprising a nonvolatile memory cell transistor having a control gate electrode and a memory gate electrode, comprising steps of:
(a) forming a first gate insulating film over a semiconductor substrate;
(b) after the step (a), forming the control gate electrode over the first gate insulating film;
(c) after the step (b), forming a second gate insulating film over the semiconductor substrate, side surface of the control gate electrode and top surface of the control gate electrode, wherein the second gate insulating includes a charge storage film;
(d) after the step (c), depositing a conductive film over the second gate insulating film;
(e) after the step (d), forming a mask layer in order to cover a part of the conductive film;
(f) after the step (e), dry etching the conductive film by using the mask layer, thereby the conductive film exposed from the mask layer is processed to form a side spacer-like shaped said memory gate electrode on a side wall of the control gate through the second gate insulating film and the conductive film covered with the mask layer is patterned to a contact region of the memory gate electrode;
(g) after the step (f), removing the mask layer;
(h) after the step (g), forming an interlayer insulating film over the control gate electrode and the memory gate electrode;
(i) after the step (h), forming a hole in the interlayer insulating film in order to connect with the contact region of the memory gate electrode; and
(j) after the step (i), forming a plug in the hole.
9. A manufacturing method of a semiconductor integrated circuit device according to the claim 8 ,
wherein the memory gate electrode includes a polysilicon film.
10. A manufacturing method of a semiconductor integrated circuit device according to the claim 9 , further comprising the step of between the step (g) and (h), forming a silicide film on the poly silicon film.
11. A manufacturing method of a semiconductor integrated circuit device according to the claim 10 ,
wherein the silicide film is formed of a cobalt silicide.
12. A manufacturing method of a semiconductor integrated circuit device according to the claim 8 ,
wherein the charge storage film is formed of a silicon nitride.
13. A manufacturing method of a semiconductor integrated circuit device according to the claim 8 ,
wherein the mask layer is a resist film.
14. A manufacturing method of a semiconductor integrated circuit device according to the claim 8 ,
wherein the hole is not formed on the side spacer-like memory gate electrode.
15. A manufacturing method of a semiconductor integrated circuit device comprising a nonvolatile memory cell transistor having a control gate electrode and a memory gate electrode, comprising steps of:
(a) forming a first gate insulating film over a semiconductor substrate;
(b) after the step (a), forming the control gate electrode over the first gate insulating film;
(c) after the step (b), forming a second gate insulating film over the semiconductor substrate, side surface of the control gate electrode and top surface of the control gate electrode, wherein the second gate insulating includes a first oxide film formed over the semiconductor substrate, a nitride film formed over the first oxide film and a second oxide film formed over the nitride mm;
(d) after the step (c), depositing a poly silicon film over the second gate insulating film;
(e) after the step (d), forming a resist mask in order to cover a part of the poly silicon film;
(f) after the step (e), dry etching the poly silicon film by using the resist mask, thereby the poly silicon film exposed from the resist mask is processed to form a side spacer-like shaped said memory gate electrode on a sidewall of the control gate electrode through the second gate insulating film and the polysilicon film covered with the resist mask is patterned to a contact region of the memory gate electrode;
(g) after the step (f), removing the resist mask;
(h) after the step (g), forming an interlayer insulating film over the control gate electrode and the memory gate electrode;
(i) after the step (h), forming a hole in the interlayer insulating film in order to connect with the contact region of the memory gate electrode, wherein the hole is not formed on the side spacer-like memory gate electrode; and
(j) after the step (i), forming a plug in the hole.
16. A manufacturing method of a semiconductor integrated circuit device according to the claim 15 , further comprising the step of, between the step (g) and (h), forming a silicide film on the polysilicon film.
17. A manufacturing method of a semiconductor integrated circuit device according to the claim 16 ,
wherein the silicide film is formed of a cobalt silicide.