Light erasable memory and method therefor
View Patent ↗A semiconductor device has a semiconductor substrate that in turn has a top semiconductor layer portion and a major supporting portion under the top semiconductor layer portion. An interconnect layer is over the semiconductor layer. A memory array is in a portion of the top semiconductor layer portion and a portion of the interconnect layer. The memory is erased by removing at least a portion of the major supporting portion and, after the step of removing, applying light to the memory array from a side opposite the interconnect layer. The result is that the memory array receives light from the backside and is erased.
1. For a semiconductor device comprising a semiconductor substrate comprising a top semiconductor layer portion and a major supporting portion under the top semiconductor layer portion, an interconnect layer over the semiconductor layer, and a memory array in a portion of the top semiconductor layer portion and a portion of the interconnect layer, a method of erasing the memory array, comprising:
removing at least a portion of the major supporting portion;
after the step of removing, applying light to the memory array from a side opposite the interconnect layer;
attaching a supporting substrate to the interconnect layer before the step of removing at least a portion; and
removing the supporting substrate after the step of removing at least a portion.
2. The method of claim 1 wherein the step of removing is further characterized by forming an opening in the major supporting portion.
3. The method of claim 2 , wherein the semiconductor substrate is further characterized by comprising a insulating layer between the major supporting surface and the top semiconductor layer portion; wherein the step of removing is further characterized by the opening extending through the major supporting portion to the insulating layer.
4. The method of claim 3 further comprising:
attaching a light transmitting layer to the major supporting portion and over the opening.
5. The method of claim 1 wherein the step of applying light is further characterized by the light being UV.
6. The method of claim 1 wherein the step of removing at least a portion is further characterized by removing substantially all of the major supporting portion to leave an exposed backside of the semiconductor substrate.
7. The method of claim 6 further comprising:
attaching a light emitting device having a light emitting diode (LED) to the exposed backside of the semiconductor substrate.
8. The method of claim 6 further comprising:
attaching a light emitting device having a gallium nitride based heterojunction diode to the exposed backside of the semiconductor substrate.
9. The method of claim 8 further comprising:
forming contacts from the interconnect layer to the light emitting device through the top semiconductor layer portion.
10. The method of claim 1 , wherein:
the step of applying light comprises applying light of at least 3 eV toward the memory array from a side opposite to the interconnect layer.
11. The method of claim 10 wherein the step of removing at least a portion comprises removing substantially all of the major supporting portion to leave an exposed backside of the semiconductor substrate, further comprising:
attaching a light emitting device having a gallium nitride based heterojunction diode to the exposed backside of the semiconductor substrate.
12. The method of claim 11 , further comprising:
forming a via from the interconnect layer to the light emitting device; and
filling the via with conductive material.
13. The method of claim 12 , wherein:
the semiconductor substrate is further characterized as having an insulating layer between the top semiconductor layer portion and the major supporting portion; and
the step of removing at least a portion is further characterized by exposing the insulating layer.
14. The method of claim 10 , wherein the step of removing at least a portion is further characterized by forming an opening aligned to the memory array in the major supporting portion.
15. The method of claim 14 , wherein
the semiconductor substrate is further characterized as having an insulating layer between the top semiconductor layer portion and the major supporting portion; and
the step of removing at least a portion is further characterized by exposing the insulating layer.
16. The method of claim 15 further comprising:
attaching a light transmitting layer to the top semiconductor layer portion and over the opening.