IP Library Granted Patent US 7,842,542
Granted Patent B2
US 7,842,542 · App. 12/266,313 · Granted Nov 30, 2010

Embedded semiconductor die package and method of making the same using metal frame carrier

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Quick Facts
Patent No.
US 7,842,542
App. No.
12/266,313
Filed
Nov 6, 2008
Granted
Nov 30, 2010
Kind
B2
Examiner
NHU, DAVID
Art Unit
2895
USPC
438/106
Abstract

An embedded semiconductor die package is made by mounting a frame carrier to a temporary carrier with an adhesive. The frame carrier includes die mounting sites each having a lead frame interconnect structure around a cavity. A semiconductor die is disposed in each cavity. An encapsulant is deposited in the cavity over the die. A package interconnect structure is formed over the lead frame interconnect structure and encapsulant. The package interconnect structure and lead frame interconnect structure are electrically connected to the die. The frame carrier is singulated into individual embedded die packages. The semiconductor die can be vertically stacked or placed side-by-side within the cavity. The embedded die packages can be stacked and electrically interconnected through the lead frame interconnect structure. A semiconductor device can be mounted to the embedded die package and electrically connected to the die through the lead frame interconnect structure.

Claims (97)

1. A method of making an embedded semiconductor die package, comprising:

providing a temporary carrier with a wafer-form factor;

depositing an adhesive layer over the temporary carrier;

providing a prefabricated frame carrier having a similar wafer-form factor as the wafer-form factor of the temporary carrier, the prefabricated frame carrier including a plurality of leadframe interconnect structures and corresponding die mounting sites disposed across the wafer-form factor of the prefabricated frame carrier, each leadframe interconnect structure being formed around the corresponding die mounting site;

mounting the prefabricated frame carrier to the adhesive layer;

disposing semiconductor die within the corresponding die mounting sites;

depositing an encapsulant over the semiconductor die;

forming a first conductive layer over a first surface of the lead frame interconnect structure and the encapsulant, the first conductive layer and the lead frame interconnect structure being electrically connected to the semiconductor die;

forming a first insulating layer over the first conductive layer;

removing the temporary carrier;

forming a second conductive layer over a second surface of the lead frame interconnect structure and the encapsulant opposite the first surface of the lead frame interconnect structure and the encapsulant, the second conductive layer being electrically connected to the lead frame interconnect structure;

forming a second insulating layer over the second conductive layer; and

singulating the prefabricated frame carrier to separate the leadframe interconnect structures and semiconductor die.

2. The method of making an embedded semiconductor die package according to claim 1 , further including removing a portion of the encapsulant extending above the lead frame interconnect structure.

3. The method of making an embedded semiconductor die package according to claim 1 , further including vertically stacking a plurality of semiconductor die within the cavity.

4. The method of making an embedded semiconductor die package according to claim 1 , further including disposing a plurality of semiconductor die side-by-side within the cavity.

5. The method of making an embedded semiconductor die package according to claim 1 , further including:

stacking a plurality of the embedded semiconductor die packages; and

electrically interconnecting the semiconductor die within the plurality of the embedded semiconductor die packages through the first and second conductive layers and the lead frame interconnect structure.

6. The method of making an embedded semiconductor die package according to claim 1 , further including:

providing a substrate;

mounting the embedded semiconductor die package to the substrate; and

electrically connecting the semiconductor die within the embedded semiconductor die package to the substrate.

7. The method of making an embedded semiconductor die package according to claim 1 , further including:

mounting a semiconductor device to the embedded semiconductor die package; and

electrically connecting the semiconductor device to the semiconductor die within the embedded semiconductor die package through the first and second conductive layers and the lead frame interconnect structure.

8. A method of making an embedded semiconductor die package, comprising:

providing a temporary carrier;

depositing an adhesive layer over the temporary carrier;

mounting a frame carrier to the adhesive layer, the frame carrier including a plurality of die mounting sites each having a lead frame interconnect structure around a cavity;

disposing a semiconductor die in the cavity;

depositing an encapsulant in the cavity over the semiconductor die;

forming a first conductive layer over a first side of the lead frame interconnect structure and the encapsulant, the first conductive layer and the lead frame interconnect structure being electrically connected to the semiconductor die;

forming a first insulating layer over the first conductive layer; and

singulating the frame carrier.

9. The method of making an embedded semiconductor die package according to claim 8 , further including depositing an adhesive between the temporary carrier and the frame carrier.

10. The method of making an embedded semiconductor die package according to claim 8 , further including:

removing the temporary carrier;

forming a second conductive layer over a second side of the lead frame interconnect structure and the encapsulant opposite the first side of the lead frame interconnect structure and the encapsulant; and

forming a second insulating layer over the second conductive layer.

11. The method of making an embedded semiconductor die package according to claim 10 , further including:

stacking a plurality of the embedded semiconductor die packages; and

electrically interconnecting the semiconductor die within the plurality of the embedded semiconductor die packages through the first and second conductive layers and the lead frame interconnect structure.

12. The method of making an embedded semiconductor die package according to claim 10 , further including:

mounting a semiconductor device to the embedded semiconductor die package; and

electrically connecting the semiconductor device to the semiconductor die within the embedded semiconductor die package through the first and second conductive layers and the lead frame interconnect structure.

13. The method of making an embedded semiconductor die package according to claim 8 , wherein the frame carrier is prefabricated.

14. The method of making an embedded semiconductor die package according to claim 8 , further including vertically stacking or placing side-by-side a plurality of semiconductor die within the cavity.

15. A method of making an embedded semiconductor die package, comprising:

providing a temporary carrier;

mounting a frame carrier to the temporary carrier, the frame carrier including a plurality of die mounting sites each having a lead frame interconnect structure around a cavity;

disposing a semiconductor die in the cavity;

depositing an encapsulant in the cavity over the semiconductor die;

forming a package interconnect structure over the lead frame interconnect structure and the encapsulant, the package interconnect structure and the lead frame interconnect structure being electrically connected to the semiconductor die; and

singulating the frame carrier.

16. The method of making an embedded semiconductor die package according to claim 15 , further including depositing an adhesive between the temporary carrier and the frame carrier.

17. The method of making an embedded semiconductor die package according to claim 15 , wherein the frame carrier is prefabricated.

18. The method of making an embedded semiconductor die package according to claim 15 , further including vertically stacking or placing side-by-side a plurality of semiconductor die within the cavity.

19. The method of making an embedded semiconductor die package according to claim 15 , further including:

stacking a plurality of the embedded semiconductor die packages; and

electrically interconnecting the semiconductor die within the plurality of the embedded semiconductor die packages through the package interconnect structure and the lead frame interconnect structure.

20. The method of making an embedded semiconductor die package according to claim 15 , further including:

mounting a semiconductor device to the embedded semiconductor die package; and

electrically connecting the semiconductor device to the semiconductor die within the embedded semiconductor die package through the package interconnect structure and the lead frame interconnect structure.

21. The method of making an embedded semiconductor die package according to claim 15 , wherein the package interconnect structure includes a redistribution layer, IPDs, thin-film circuit layer, contact pad, insulating layer, and signal trace.

22. A method of making an embedded semiconductor die package, comprising:

providing a frame carrier having a wafer-form factor including a plurality of die mounting sites disposed across the wafer-form factor of the frame carrier each having a lead frame interconnect structure around a cavity;

disposing a semiconductor die in the cavity;

depositing an encapsulant in the cavity over the semiconductor die;

forming a package interconnect structure over the encapsulant, the package interconnect structure and the lead frame interconnect structure being electrically connected to the semiconductor die; and

singulating the frame carrier.

23. The method of making an embedded semiconductor die package according to claim 22 , further including:

providing a temporary carrier;

depositing an adhesive layer over the temporary carrier; and

mounting a frame carrier to the adhesive layer.

24. The method of making an embedded semiconductor die package according to claim 23 , wherein forming the package interconnect structure includes:

forming a first conductive layer over a first side of the lead frame interconnect structure and the encapsulant, the first conductive layer and the lead frame interconnect structure being electrically connected to the semiconductor die;

forming a first insulating layer over the first conductive layer; and

removing the temporary carrier.

25. The method of making an embedded semiconductor die package according to claim 24 , wherein forming the package interconnect structure further includes:

forming a second conductive layer over a second side of the lead frame interconnect structure and the encapsulant opposite the first side of the lead frame interconnect structure and the encapsulant, the second conductive layer being electrically connected to the lead frame interconnect structure; and

forming a second insulating layer over the second conductive layer.

26. The method of making an embedded semiconductor die package according to claim 22 , wherein the package interconnect structure includes a redistribution layer, IPDs, thin-film circuit layer, contact pad, insulating layer, and signal trace.

27. The method of making an embedded semiconductor die package according to claim 22 , further including removing a portion of the encapsulant extending above the lead frame interconnect structure.

28. The method of making an embedded semiconductor die package according to claim 22 , wherein the frame carrier is prefabricated.

29. The method of making an embedded semiconductor die package according to claim 22 , further including vertically stacking a plurality of semiconductor die within the cavity.

30. The method of making an embedded semiconductor die package according to claim 22 , further including disposing a plurality of semiconductor die side-by-side within the cavity.

31. The method of making an embedded semiconductor die package according to claim 22 , further including:

stacking a plurality of the embedded semiconductor die packages; and

electrically interconnecting the semiconductor die within the plurality of the embedded semiconductor die packages through the package interconnect structure and the lead frame interconnect structure.

32. The method of making an embedded semiconductor die package according to claim 22 , further including:

providing a substrate;

mounting the embedded semiconductor die package to the substrate; and

electrically connecting the semiconductor die within the embedded semiconductor die package to the substrate.

33. The method of making an embedded semiconductor die package according to claim 22 , further including:

mounting a semiconductor device to the embedded semiconductor die package; and

electrically connecting the semiconductor device to the semiconductor die within the embedded semiconductor die package through the package interconnect structure and the lead frame interconnect structure.