IP Library Granted Patent US 7,859,634
Granted Patent B2
US 7,859,634 · App. 12/078,397 · Granted Dec 28, 2010

Display device

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Quick Facts
Patent No.
US 7,859,634
App. No.
12/078,397
Filed
Mar 31, 2008
Granted
Dec 28, 2010
Kind
B2
Examiner
VU, PHU
Art Unit
2871
USPC
349/152
Abstract

A display device includes a display panel, and a semiconductor chip having plural bump electrodes and mounted on a substrate constituting the display panel. The plural bump electrodes include a first bump electrode arranged in the vicinity of a center for a longitudinal direction of the semiconductor chip, and a second bump electrode arranged in the vicinity of an end portion in the longitudinal direction of the semiconductor chip. The semiconductor chip has one or more than one conductive layer inside. Assuming that a surface of the semiconductor chip having the bump electrodes formed thereon is a lower side, the number of the conductive layers formed on the second bump electrode is greater than the number of the conductive layers formed on the first bump electrode. The conductive layer formed on the first and the second bump electrode includes a dummy conductive layer. Further, the plural bump electrodes are electrically connected to a wiring layer formed on a substrate constituting the display panel through an anisotropic conductive film.

Claims (13)

1. A display device comprising:

a display panel having a first substrate, a second substrate, and liquid crystal molecules sandwiched between the first and the second substrates; and

a semiconductor chip having a semiconductor substrate and plural bump electrodes, the semiconductor chip being mounted on the first substrate constituting the display panel,

wherein the plural bump electrodes include a first bump electrode arranged in the vicinity of a center for a longitudinal direction of the semiconductor chip, and a second bump electrode arranged in the vicinity of an end portion in the longitudinal direction of the semiconductor chip,

wherein the semiconductor chip has at least one metal layer inside, and

wherein a quantity of metal layers of the at least one metal layer between the second bump and the semiconductor substrate is greater than a quantity of metal layers of the at least one metal layer between the first bump and the semiconductor substrate, and

wherein a height from the semiconductor substrate to the second bump is greater than a height from the semiconductor substrate to the first bump.

2. The display device according to claim 1 , wherein a height of the first bump from the at least one metal layer connected to the first bump is the same as a height of the second bump from the at least one metal layer connected to the second bump.

3. The display device according to claim 1 , wherein the bump electrode formation surface of the semiconductor chip is warped in a convex direction.

4. The display device according to claim 2 , wherein the bump electrode formation surface of the semiconductor chip is warped in a convex direction.

5. The display device according to claim 1 , wherein the at least one metal layer includes a dummy conductive layer formed on the first and the second bump electrode.

6. The display device according to claim 1 , wherein the plural bump electrodes are electrically connected to a wiring layer formed on the first substrate constituting the display panel through an anisotropic conductive film.

7. The display device according to claim 1 , wherein the display panel is a liquid crystal display panel.