Multichip module package and fabrication method
View Patent ↗A method for fabricating a multichip module package includes providing a first heat sink positioned for releasing heat from the package and providing a second heat sink positioned proximate the first heat sink. The heat sinks are thermally coupled and electrically isolated to and from one another. A first semiconductor device is attached to the first heat sink in thermal and electrical communication therewith and electrically insulated from the second heat sink. A second semiconductor device is attached to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink.
1. A multichip module package, comprising:
a first heat sink positioned for releasing heat from the package;
a second heat sink positioned proximate the first heat sink wherein the heat sinks are planar in two substantially parallel planes;
means thermally coupling and electrically isolating the heat sinks to and from one another;
a first semiconductor device attached to the first heat sink in thermal and electrical communication therewith and electrically insulated from the second heat sink; and
a second semiconductor device attached to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink.
2. The package of claim 1 :
further comprising:
a substrate attached to the second heat sink on the side thereof opposite the first heat sink; and
electrical circuitry on the substrate on the side thereof opposite the second heat sink;
and wherein:
the semiconductor devices are electrically connected to the electrical circuitry.
3. The package of claim 1 further comprising an electrically conductive epoxy electrically connecting the semiconductor devices to their respective heat sinks.
4. The package of claim 1 wherein the package is configured for applying different electrical potentials respectively to the first heat sink and to the second heat sink.
5. A multichip module package, comprising:
a first heat sink positioned for releasing heat from the package;
a second heat sink positioned beneath the first heat sink;
means thermally coupling and electrically isolating the heat sinks to and from one another;
a substrate attached to the second heat sink on the side thereof opposite the first heat sink;
a first semiconductor device attached to the first heat sink through and in thermal and electrical communication therewith and electrically insulated from the second heat sink;
a second semiconductor device attached to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink; and
an encapsulant environmentally encapsulating the first and second semiconductor devices.
6. The package of claim 5 further comprising electrical circuitry on the substrate opposite the second heat sink, and wherein the semiconductor devices are electrically connected to the electrical circuitry.
7. The package of claim 5 further comprising an electrically conductive epoxy electrically connecting the semiconductor devices to their respective heat sinks.
8. The package of claim 5 wherein the heat sinks are planar in two substantially parallel planes.
9. The package of claim 5 wherein the package is configured for applying different electrical potentials respectively to the first heat sink and to the second heat sink.