Semiconductor device and method of forming a 3D inductor from prefabricated pillar frame
View Patent ↗A semiconductor device is made by mounting a semiconductor die over a carrier. A ferromagnetic inductor core is formed over the carrier. A prefabricated pillar frame is formed over the carrier, semiconductor die, and inductor core. An encapsulant is deposited over the semiconductor die and inductor core. A portion of the pillar frame is removed. A remaining portion of the pillar frame provides an interconnect pillar and inductor pillars around the inductor core. A first interconnect structure is formed over a first surface of the encapsulant. The carrier is removed. A second interconnect structure is formed over a second surface of the encapsulant. The first and second interconnect structures are electrically connected to the inductor pillars to form one or more 3D inductors. In another embodiment, a shielding layer is formed over the semiconductor die. A capacitor or resistor is formed within the first or second interconnect structures.
1. A method of making a semiconductor device, comprising:
providing a temporary carrier;
mounting a semiconductor die or component over the temporary carrier;
forming an inductor core over the temporary carrier;
mounting a prefabricated pillar frame over the temporary carrier and semiconductor die or component, the prefabricated pillar frame including a plurality of bodies extending from a plate, the bodies being disposed around the inductor core;
depositing an encapsulant through an opening in the plate to cover the semiconductor die or component, bodies, and inductor core;
removing the plate of the prefabricated pillar frame while leaving the bodies to form inductor pillars around the inductor core;
forming a first interconnect structure over a first surface of the encapsulant;
removing the temporary carrier; and
forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form a 3D inductor.
2. The method of claim 1 , wherein the inductor core includes ferromagnetic material.
3. The method of claim 1 , wherein removing the plate of the prefabricated pillar frame leaves an interconnect pillar.
4. The method of claim 3 , further including stacking a plurality of the semiconductor die or components electrically connected through the interconnect pillar.
5. The method of claim 3 , further including disposing a plurality of the semiconductor die or components side-by-side electrically connected through the interconnect pillar.
6. The method of claim 1 , further including forming a shielding layer over the semiconductor die or component.
7. The method of claim 1 , further including forming an integrated passive device within the first or second interconnect structures.
8. A method of making a semiconductor device, comprising:
providing a carrier;
mounting a semiconductor component over the carrier;
forming an inductor core over the carrier;
mounting a prefabricated pillar frame over the carrier, semiconductor component, and inductor core;
depositing an encapsulant over the semiconductor component, prefabricated pillar frame, and inductor core;
removing a portion of the prefabricated pillar frame, wherein a remaining portion of the prefabricated pillar frame provides inductor pillars around the inductor core;
forming a first interconnect structure over a first surface of the encapsulant;
removing the carrier; and
forming a second interconnect structure over a second surface of the encapsulant opposite the first interconnect structure, the first and second interconnect structures being electrically connected to the inductor pillars to form a 3D inductor.
9. The method of claim 8 , wherein the remaining portion of the prefabricated pillar frame provides an interconnect pillar.
10. The method of claim 8 , wherein the first or second interconnect structure is electrically connected to a contact pad of the semiconductor component.
11. The method of claim 8 , further including forming a shielding layer over the semiconductor component.
12. The method of claim 8 , further including forming an integrated passive device within the first or second interconnect structures.
13. The method of claim 8 , further including forming a discrete semiconductor over the first interconnect structure.