IP Library Granted Patent US 8,017,502
Granted Patent B2
US 8,017,502 · App. 11/615,929 · Granted Sep 13, 2011

Wafer system with partial cuts

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Quick Facts
Patent No.
US 8,017,502
App. No.
11/615,929
Filed
Dec 22, 2006
Granted
Sep 13, 2011
Kind
B2
Examiner
PHAM, LONG
Art Unit
2814
USPC
438/462
Abstract

A wafer system is provided including providing a wafer having a topside and a backside, forming a partial cut from the topside of the wafer within a wafer rim and thinning the wafer from the backside for exposing the partial cut at the backside within the wafer rim.

Claims (28)

1. A method of singulating a wafer comprising:

providing a wafer having a topside and a backside;

forming partial cuts from the topside of the wafer within a wafer rim, the partial cuts all formed in one direction;

thinning the wafer from the backside for exposing the partial cuts at the backside within the wafer rim; and

singulating the wafer with a singulation line in a second direction different from the one direction after thinning the wafer.

2. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes forming a partial cut chord between a first point and a second point, different from the first point, of the wafer rim.

3. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes forming partial cut line segments having a segment gap.

4. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes forming a partial cut jogged segment having a corner formed from a first segment and a second segment of the partial cut jogged segment.

5. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes forming a partial cut gridded segment having a first segment and a second segment perpendicular to the first segment.

6. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes forming partial cut intersecting line segments having first line segments and second line segments perpendicular to the first line segments.

7. The method as claimed in claim 1 further comprising forming a singulation line intersecting the partial cut.

8. The method as claimed in claim 1 wherein forming the partial cut from the topside of the wafer includes outlining a singulation element.

9. The method as claimed in claim 1 further comprising separating a singulation element from the wafer.

10. The method as claimed in claim 1 further comprising forming partial cuts of different configurations in the wafer.

11. A method of singulating a wafer comprising:

providing a wafer having a topside, a backside, and a wafer rim at a peripheral region of the wafer;

forming partial cuts from the topside of the wafer within the wafer rim without reaching the backside, the partial cuts all formed in one direction;

thinning the wafer from the backside for exposing the partial cuts at the backside within the wafer rim; and

forming a singulation line in the wafer from the topside and intersecting the partial cuts after thinning the wafer.

12. The method as claimed in claim 11 further comprising mounting a topside protective film over the topside of the wafer having the partial cut.

13. The method as claimed in claim 11 further comprising mounting a backside protective layer over the backside of the wafer having the partial cut exposed at the backside.

14. The method as claimed in claim 11 further comprising supporting the wafer with a carrier ring.

15. The method as claimed in claim 11 wherein forming the partial cut in the wafer includes lasing the partial cut.

16. The method as claimed in claim 11 wherein forming the singulation line in the wafer includes lasing the singulation line.

17. The method as claimed in claim 11 wherein forming the singulation line in the wafer includes sawing the singulation line.

18. The method as claimed in claim 11 wherein forming the singulation line in the wafer includes forming the singulation line to the backside of the wafer.

19. The method as claimed in claim 11 wherein forming the wafer having the topside includes forming a circuit along the topside.

20. The method as claimed in claim 11 further comprising separating an integrated circuit die from the wafer.