IP Library Granted Patent US 8,264,901
Granted Patent B2
US 8,264,901 · App. 12/901,990 · Granted Sep 11, 2012

Semiconductor device and control method of the same

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Quick Facts
Patent No.
US 8,264,901
App. No.
12/901,990
Filed
Oct 11, 2010
Granted
Sep 11, 2012
Kind
B2
Examiner
YANG, HAN
Art Unit
2824
USPC
365/185.2
Abstract

The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit ( 16 ) connected to a core cell ( 12 ) provided in a nonvolatile memory cell array ( 10 ), a second current-voltage conversion circuit ( 26 ) connected to a reference cell ( 22 ) through a reference cell data line ( 24 ), a sense amplifier ( 18 ) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit ( 28 ) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit ( 30 ) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.

Claims (10)

1. A method of controlling a semiconductor device comprising:

comparing a voltage level at a reference cell data line with a predefined voltage level; and

charging the reference cell data line when a voltage level at a reference cell data line is lower than a predefined voltage level during pre-charging the reference cell data line, wherein said charging is performed by a charging circuit and a first circuit and the first circuit is coupled to a reference cell of the semiconductor device.

2. The method as claimed in claim 1 , further comprising:

averaging outputs from multiple reference cells, wherein the first circuit outputs an output from an average circuit.

3. The method as claimed in claim 1 , further comprising:

sensing after pre-charging of the reference cell data line is finished.

4. The method as claimed in claim 1 , wherein the first circuit comprises an average circuit operable to average outputs from multiple reference cells.

5. The method as claimed in claim 4 , wherein the average circuit has a first average circuit outputting to the first current-voltage conversion circuit, and a second average circuit outputting an output thereof to a sense amplifier.

6. The method as claimed in claim 1 , wherein the first circuit comprises a differential circuit to which the voltage level at the reference cell data line and the predefined voltage level are input.