IP Library Granted Patent US 8,383,458
Granted Patent B2
US 8,383,458 · App. 12/974,265 · Granted Feb 26, 2013

Integrated circuit package system employing an offset stacked configuration and method for manufacturing thereof

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Quick Facts
Patent No.
US 8,383,458
App. No.
12/974,265
Filed
Dec 21, 2010
Granted
Feb 26, 2013
Kind
B2
Art Unit
2815
USPC
438/109
Abstract

A method for manufacturing an integrated circuit package system includes: providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect.

Claims (33)

1. A method for manufacturing an integrated circuit package system comprising:

providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and

mounting an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect and including a flip integrated circuit or a flip chip component.

2. The method as claimed in claim 1 wherein:

mounting the offset package includes forming a first portion over the first integrated circuit and a second portion overhanging the base substrate.

3. A method for manufacturing an integrated circuit package system comprising:

providing a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect formed on one side; and

mounting a first portion of an offset package over the first integrated circuit and a second portion of the offset package overhanging the base substrate, the second portion coupled to the base substrate and the offset package including a flip integrated circuit or a flip chip component.

4. The method as claimed in claim 3 wherein:

providing the first integrated circuit coupled to the base substrate by an electrical interconnect formed on one side includes utilizing lead-in-film structures.

5. The method as claimed in claim 3 wherein:

coupling the second portion to the base substrate includes using an interposer as a system interconnect.

6. The method as claimed in claim 3 wherein:

mounting the offset package includes positioning the offset package to overhang one or more sides of the first integrated circuit.

7. The method as claimed in claim 3 further comprising:

mounting a passive component, an active component, or a combination thereof on the base substrate.

8. An integrated circuit package system comprising:

a base package including a first integrated circuit coupled to a base substrate by an electrical interconnect on one side; and

an offset package over the base package, the offset package electrically coupled to the base substrate via a system interconnect and including a flip integrated circuit or a flip chip component.

9. The system as claimed in claim 8 further comprising:

a base package body over the electrical interconnect and a portion of the first integrated circuit and the base substrate.

10. The system as claimed in claim 8 further comprising:

a system package body over the electrical interconnect and around a portion of the offset package.

11. The system as claimed in claim 8 wherein:

the offset package includes a first portion on the first integrated circuit and a second portion overhanging the base substrate.

12. The system as claimed in claim 8 wherein:

the system interconnect includes a solder ball structure.

13. The system as claimed in claim 8 wherein:

the electrical interconnect includes a lead-in-film structure.

14. The system as claimed in claim 8 wherein:

the system interconnect includes an interposer.

15. The system as claimed in claim 8 further comprising:

a passive component, an active component, or a combination thereof on the base substrate.