IP Library Granted Patent US 8,530,898
Granted Patent B2
US 8,530,898 · App. 12/912,799 · Granted Sep 10, 2013

Display device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,530,898
App. No.
12/912,799
Filed
Oct 27, 2010
Granted
Sep 10, 2013
Kind
B2
Art Unit
2829
USPC
257/59
Abstract

A display device which uses a TFT having a gate electrode film thereof arranged on a light source side can also suppress the increase of parasitic capacitance while suppressing the generation of a light leakage current. On at least one end of the TFT, between a high concentration region which constitutes a source region or a drain region and a channel region, a first low concentration region which is arranged on a high concentration region side and exhibits low impurity concentration and a second low concentration region which exhibits impurity concentration even lower than the impurity concentration of the first low concentration region are provided in this order.

Claims (12)

1. A display device comprising:

a semiconductor film which is arranged between a video signal line and a pixel electrode and which is provided with one or more channel regions and with one or more impurity doped regions which are doped with a first impurity;

a light source which is arranged below the semiconductor film and which generates light; and

one or more gate electrodes which are arranged below the semiconductor film and above the light source, and face the one or more channel regions in an opposed manner respectively, wherein:

a low concentration region is arranged in contact between one channel region and one impurity doped region which are adjacent to each other, the low concentration region being doped with the first impurity or with a second impurity, different than the first impurity and having an impurity concentration lower than an impurity concentration of the one impurity doped region, and

the low concentration region is comprised of a first low concentration region which is arranged adjacent to the one impurity doped region and a second low concentration region which is arranged adjacent to the channel region and which has an impurity concentration lower than the impurity concentration of the first low concentration region.

2. A display device according to claim 1 , wherein the low concentration regions are arranged in contact between any one of the one or more channel regions and any one of the impurity doped regions adjacent to each other.

3. A display device according to claim 1 , wherein at least a portion of the first low concentration region expands outside a region of the semiconductor film which faces the gate electrode in an opposed manner.

4. A display device according to claim 3 , wherein the second low concentration region is covered with the region of the semiconductor film which faces the gate electrode in an opposed manner.

5. A display device according to claim 1 , wherein the impurity concentration of the first low concentration region is set to 1×10 18 to 1×10 19 atom/cm 3 , and the impurity concentration of the second low concentration regions is set to not more than 50% of the impurity concentration of the first low concentration region.

6. A display device according to claim 1 , wherein the semiconductor film includes two channel regions.

7. A display device according to claim 1 , wherein the light source comprises a backlight.