Method and apparatus of a crystal oscillator with a noiseless and amplitude based start up control loop
View Patent ↗A large gain is used to start up the oscillation of the crystal quickly. Once the oscillation starts, the amplitude is detected. A control circuit determines based on the measured amplitude to disable a low resistance path in the controlled switch array to reduce the applied gain below the power dissipation specification of the crystal. Another technique introduces a mixed-signal controlled power supply multi-path resistive array which tailors the maximum current to the crystal. A successive approximation register converts the amplitude into several partitions and enables/disables one of several power routing paths to the inverter of the oscillator. This allows a better match between the crystal selected by the customer and the on-chip drive circuitry to power up the oscillator without stressing the crystal. The “l/f” noise of the oscillator circuit is minimized by operating transistors in the triode region instead of the linear region.
1. A crystal oscillator apparatus comprising:
a crystal oscillator powered through a controlled switch array;
an output of said crystal oscillator coupled by a transmission gate to a first amplitude detector;
a first input of a control logic coupled to an output of said first amplitude detector;
at least one output of said control logic coupled to said controlled switch array; and
said at least one output of said control logic coupled to said transmission gate.
2. The apparatus of claim 1 , wherein said controlled switch array comprises:
a first resistor in parallel with a series combination of a second resistor and a transistor.
3. The apparatus of claim 1 , where wherein said controlled switch array comprises:
a first resistor in parallel with at least one combination of another resistor in series with a transistor.
4. The apparatus of claim 1 , wherein said crystal oscillator comprises:
a first node of a crystal coupled to an input of an inverter;
a second node of said crystal coupled to an output of said inverter;
a first capacitor coupled to said first node of said crystal;
a second capacitor coupled to said second node of said crystal; and
a power lead of said inverter coupled to said controlled switch array.
5. The apparatus of claim 1 , further comprising:
an output of a resistor string coupled to an input of a second amplitude detector; and
an output of said second amplitude detector coupled to a second input of said control logic.
6. The apparatus of claim 5 , further comprising:
a first digital signal that couples a tap point of said resistor string to said output of said resistor string.
7. The apparatus of claim 5 , wherein
said first amplitude detector and said second amplitude detector are substantially similar in configuration and dimensions.
8. An apparatus comprising:
a crystal oscillator powered through a controlled switch array;
an output of said crystal oscillator coupled by a transmission gate to a first amplitude detector;
a first input of a comparator coupled to an output of said first amplitude detector;
an output of said comparator coupled to a successive approximation register (SAR); and
a plurality of digital outputs of said SAR coupled to said controlled switch array.
9. The apparatus of claim 8 , further comprising:
at least one output of said SAR coupled to a gate of said transmission gate.
10. The apparatus of claim 8 , wherein said controlled switch array comprises:
a first resistor in parallel with at least one combination of another resistor in series with a transistor.
11. The apparatus of claim 8 , wherein said crystal oscillator comprises:
a first node of a crystal coupled to an input of an inverter;
a second node of said crystal coupled to an output of said inverter;
a first capacitor coupled to said first node of said crystal;
a second capacitor coupled to said second node of said crystal; and
a power lead of said inverter coupled to said controlled switch array.
12. The apparatus of claim 8 , further comprising:
an output of a resistor string coupled to an input of a second amplitude detector; and
an output of said second amplitude detector coupled to a second input of said comparator.
13. The apparatus of claim 12 , further comprising:
a first digital signal that couples a tap point of said resistor string to said output of said resistor string.
14. The apparatus of claim 12 , wherein
said first amplitude detector and said second amplitude detector are substantially similar in configuration and dimensions.
15. A method of minimizing l/f noise in a crystal oscillator comprising the steps of:
powering said crystal oscillator through a controlled switch array;
forming said controlled switch array with a first resistor in parallel with at least one combination of another resistor in series with a transistor;
coupling an output of said crystal oscillator to a first amplitude detector;
coupling a first input of a control logic to an output of said first amplitude detector;
detecting when said first input of said control logic is greater than a reference voltage;
coupling at least one output of said control logic to said controlled switch array;
adjusting network of said controlled switch array;
supplying a reduced current to said crystal oscillator with said adjusted network, thereby minimizing said l/f noise in said crystal oscillator;
coupling an output of a resistor string to an input of a second amplitude detector; and
generating said reference voltage at an output of said second amplitude detector.
16. The method of claim 15 , further comprising the steps of:
coupling a transmission gate between said crystal oscillator and said first amplitude detector;
disabling said transmission gate with an output of said control logic; and
isolating first amplitude detector from said output of crystal oscillator.
17. The method of claim 15 , wherein
said first amplitude detector and said second amplitude detector are substantially similar in configuration and dimensions.
18. The method of claim 15 , further comprising the steps of:
selecting a tap point voltage of said resistor string.