Semiconductor device and method of manufacturing the same
View Patent ↗An upper surface of a plug (PL 1 ) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate ( 1 S), completing a CMP method for forming the plug (PL 1 ) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL 1 ) and a wiring (W 1 ) in a vertical direction can be ensured. Also, the wiring (W 1 ) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.
1. A semiconductor device comprising:
a first interlayer insulating film formed on a semiconductor substrate;
a first plug formed inside the first interlayer insulating film;
a second interlayer insulating film formed on the first interlayer insulating film and having a dielectric constant lower than a dielectric constant of silicon oxide; and
a first buried wiring formed inside the second interlayer insulating film and connected to the first plug,
an upper surface of the first plug being formed at a position higher than an upper surface of the first interlayer insulating film,
a lower surface of the first buried wiring is formed at a position lower than the upper surface of the first plug;
second plug formed inside the first interlayer insulating film; and
a second buried wiring formed inside the second interlayer insulating film and connected to the second plug,
an upper surface of the second plug is formed at a position higher than the upper surface of the first interlayer insulating film;
a lower surface of the second buried wiring is formed at a position lower than the upper surface of the second plug.
2. The semiconductor device according to claim 1 ,
wherein a MISFET is formed on a main surface of the semiconductor substrate, and
the first interlayer insulating film is formed so as to cover the MISFET.
3. The semiconductor device according to claim 2 ,
wherein the first interlayer insulating film is formed of a third interlayer insulating film formed so as to cover the MISFET and a fourth interlayer insulating film formed on the third interlayer insulating film and having lower moisture absorption characteristics than moisture absorption characteristics of the third interlayer insulating film, and
the lowermost surface of the first buried wiring is formed inside the second interlayer insulating film or inside the fourth interlayer insulating film.
4. The semiconductor device according to claim 3 ,
wherein the third interlayer insulating film is an O 3 -TEOS film, and
the fourth interlayer insulating film is a plasma TEOS film.
5. The semiconductor device according to claim 1 ,
wherein the second interlayer insulating film is formed of a silicon oxide film containing carbon.
6. The semiconductor device according to claim 1 ,
wherein the lowermost surface of the first buried wiring is formed inside the second interlayer insulating film.
7. The semiconductor device according to claim 6 ,
wherein, when a distance from the lowermost surface of the first buried wiring to the upper surface of the first plug is set as a length L 8 , and,
when a distance from the upper surface of the first interlayer insulating film to the lowermost surface of the first buried wiring is set as a length L 9 ,
a relation of “the length L 8 >the length L 9 ” is established.
8. The semiconductor device according to claim 1 ,
wherein the lowermost surface of the first buried wiring is formed inside the first interlayer insulating film.
9. The semiconductor device according to claim 8 ,
wherein, when a distance from the upper surface of the first interlayer insulating film to the upper surface of the first plug is set as a length L 10 , and,
when a distance from the lowermost surface of the first buried wiring to the upper surface of the first interlayer insulating film is set as a length L 11 ,
a relation of “the length L 10 >the length L 11 ” is established.
10. The semiconductor device according to claim 1 ,
wherein a first insulating film having a thickness thinner than a thickness of the second interlayer insulating film is formed between the first interlayer insulating film and the second interlayer insulating film, and
the first buried wiring is formed inside the second interlayer insulating film and inside the first insulating film.
11. The semiconductor device according to claim 10 ,
wherein the lowermost surface of the first buried wiring is formed inside the first insulating film.
12. The semiconductor device according to claim 11 ,
wherein, when a difference between a distance from the upper surface of the first interlayer insulating film to the upper surface of the first plug and a thickness of the first insulating film is set as a length L 4 , and,
when a difference between the thickness of the first insulating film and a distance from the upper surface of the first interlayer insulating film to the lowermost surface of the first buried wiring is set as a length L 5 ,
a relation of “the length L 4 >the length L 5 ” is established.
13. The semiconductor device according to claim 10 ,
wherein the lowermost surface of the first buried wiring is formed inside the first insulating film and inside the second interlayer insulating film.
14. The semiconductor device according to claim 13 ,
wherein, when a distance from the lowermost surface of the first buried wiring to the upper surface of the first plug is set as a length L 6 , and,
when a distance from the upper surface of the first insulating film formed so as to cover the first interlayer insulating film to the lower surface of the first buried wiring is set as a length L 7 ,
a relation of “the length L 6 >the length L 7 ” is established.
15. The semiconductor device according to claim 10 ,
wherein the lowermost surface of the first buried wiring is formed inside the first interlayer insulating film.
16. The semiconductor device according to claim 15 ,
wherein, when a distance from the upper surface of the first interlayer insulating film to the upper surface of the first plug is set as a length L 2 , and,
when a distance from the lowermost surface of the first buried wiring to the upper surface of the first interlayer insulating film is set as a length L 3 ,
a relation of “the length L 2 >the length L 3 ” is established.
17. The semiconductor device according to claim 1 ,
the first buried wiring is formed so as to have a first width, and the second buried wiring is formed so as to have a second width larger than the first width, and
a distance from the lower surface of the first buried wiring to the upper surface of the first plug is shorter than a distance from the lower surface of the second buried wiring to the upper surface of the second plug.