Semiconductor device having a complementary field effect transistor

1. A method for controlling power supply current in a CMOS circuit, the method comprising:

applying a first predetermined voltage to a diode connected n-channel replica transistor, the n-channel replica transistor operating in weak inversion;

applying a first substrate voltage to the substrate of the n-channel replica transistor so that the current flowing in the n-channel replica transistor equals a first predetermined target current; and

applying the first substrate voltage to substrates of n-channel transistors in the CMOS circuit.

2. The method as claimed in claim 1 wherein the first predetermined voltage is applied to the drain and the gate of the n-channel replica transistor.

3. The method as claimed in claim 2 wherein the source of the of the n-channel replica transistor is connected to ground.

4. The method as claimed in claim 1 wherein the first substrate voltage is a negative voltage.

5. The method as claimed in claim 4 wherein the first substrate voltage at a first temperature is lower than the first substrate voltage at a second temperature lower than the first temperature.

6. The method as claimed in claim 5 wherein the first substrate voltage is limited to a ground voltage at temperatures lower than a third temperature lower than the second temperature.

7. The method as claimed in claim 5 wherein the first substrate voltage is limited to a predetermined negative voltage at temperatures higher than a third temperature higher than the first temperature.

8. The method as claimed in claim 1 further comprising:

applying a second predetermined voltage to a diode connected p-channel replica transistor, the p-channel replica transistor operating in weak inversion;

applying a second substrate voltage to the substrate of the p-channel replica transistor so that the current flowing in the p-channel replica transistor equals a second predetermined target current; and

applying the second substrate voltage to substrates of p-channel transistors in the CMOS circuit.

9. A method for controlling power supply current in a CMOS circuit, the method comprising:

applying a first predetermined voltage to a diode connected p-channel replica transistor, the p-channel replica transistor operating in weak inversion;

applying a first substrate voltage to the substrate of the p-channel replica transistor so that the current flowing in the p-channel replica transistor equals a first predetermined target current; and

applying the first substrate voltage to substrates of p-channel transistors in the CMOS circuit.

10. The method as claimed in claim 9 wherein the first predetermined voltage is applied to the source of the p-channel replica transistor.

11. The method as claimed in claim 10 wherein the gate and the drain of the of the p-channel replica transistor is connected to ground.

12. The method as claimed in claim 9 wherein the first substrate voltage is a positive voltage.

13. The method as claimed in claim 12 wherein the first substrate voltage at a first temperature is higher than the first substrate voltage at a second temperature lower than the first temperature.

14. The method as claimed in claim 13 wherein the first substrate voltage is limited to a power supply voltage of the CMOS circuit at temperatures lower than a third temperature lower than the second temperature.

15. The method as claimed in claim 13 wherein the first substrate voltage is limited to a predetermined positive voltage at temperatures higher than a third temperature higher than the first temperature.