IP Library Granted Patent US 9,093,962
Granted Patent B2
US 9,093,962 · App. 14/402,003 · Granted Jul 28, 2015

Two-stage operational amplifier in class AB

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Quick Facts
Patent No.
US 9,093,962
App. No.
14/402,003
Filed
Nov 18, 2014
Granted
Jul 28, 2015
Kind
B2
Art Unit
2845
USPC
341/155
Abstract

The invention relates to a two-stage operational amplifier ( 400 ) in class AB for driving a load (R LB , R LA ) comprising: an input stage ( 401 ) comprising differential input terminals (I N , 1 P ) and a first differential output terminal (O 1 P) and a second differential output terminal (O 1 N) for providing a first differential driving signal (Out 1 P) and a second differential driving signal (Out 1 N), respectively; an output stage ( 402 ) comprising a first output branch ( 403 ) having a first differential input terminal (I 1 P) operatively connected to the first differential output terminal (O 1 P) of the input stage ( 401 ) to receive the first differential driving signal (OUT 1 P) and a second output branch ( 404 ) having a second differential input terminal (I 1 N) operatively connected to the second differential output terminal (O 1 N) of the output stage ( 401 ) to receive the second differential driving signal (Out 1 N), —a control circuit ( 405 ) configured to control the output stage ( 402 ).

Claims (15)

1. Two-stage operational amplifier in class AB for driving a load comprising:

an input stage comprising differential input terminals and a first differential output terminal and a second differential output terminal for providing a first differential driving signal and a second differential driving signal, respectively;

an output stage comprising a first output branch having a first differential input terminal operatively connected to the first differential output terminal of the input stage to receive the first differential driving signal and a second output branch having a second differential input terminal operatively connected to the second differential output terminal of the output stage to receive the second differential driving signal,

a control circuit configured to control the output current on the first output branch and the second output branch of the output stage, the control circuit comprising a first PMOS transistor in a diode configuration and operatively connected in a current mirror configuration to a second PMOS transistor of the first output branch of the output stage, a first NMOS transistor connected in series with the first PMOS transistor and having a gate terminal connected to a bias voltage, a third PMOS transistor in a diode configuration and operatively connected in a current mirror configuration to a fourth PMOS transistor of the second output branch of the output stage, a second NMOS transistor connected in series with the third PMOS transistor and having a gate terminal connected to the bias voltage,

wherein the control circuit further comprises:

a third NMOS transistor operatively connected in parallel with the first NMOS transistor and having a gate terminal arranged to receive the second differential driving signal, and

a fourth NMOS transistor operatively connected in parallel with the second NMOS transistor and having a gate terminal arranged to receive the first differential driving signal.

2. The operational amplifier of claim 1 , wherein the first PMOS transistor has a source terminal connected to a first reference voltage and a drain terminal connected to both a drain terminal of the first NMOS transistor and a drain terminal of the third NMOS transistor, both the first NMOS transistor and the third NMOS transistor (M N3B ) having source terminals connected to a second reference voltage.

3. The operational amplifier of claim 1 , wherein the third PMOS transistor has a source terminal connected to the first reference voltage and a drain terminal connected to both a drain terminal of the second NMOS transistor and a drain terminal of the fourth NMOS transistor, both the second NMOS transistor and the fourth NMOS transistor having source terminals connected to the second reference voltage.

4. The operational amplifier claim 1 , wherein the first output branch comprising the second PMOS transistor and a fifth NMOS transistor connected in series one another between the first reference voltage and the second reference voltage, the second PMOS transistor of the first output branch being connected in a current mirror configuration with the first PMOS transistor of the control circuit.

5. The operational amplifier claim 1 , wherein the second output branch comprising a fourth PMOS transistor and a sixth NMOS transistor connected in series one another between the first reference voltage and the second reference voltage, the fourth PMOS transistor of the first output branch being connected in a current mirror configuration with the third PMOS transistor of the control circuit.

6. An Analog-to-Digital Converter comprising a two-stage class AB operational amplifier in accordance with claim 1 .

7. A portable equipment ( 500 ) comprises:

an Analog-to-Digital Converter according to claim 6 ;

a digital filter.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2019
From: OPTIS CIRCUIT TECHNOLOGY, LLC,
To: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
Reel/Frame 048529/0510 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2019
From: ST-ERICSSON SA, EN LIQUIDATION
To: OPTIS CIRCUIT TECHNOLOGY, LLC,
Reel/Frame 048504/0519 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2014
From: BARBIERI, ANDREA; NICOLLINI, GERMANO
To: ST-ERICSSON SA
Reel/Frame 034200/0455 →