IP Library Granted Patent US 9,158,700
Granted Patent B2
US 9,158,700 · App. 13/354,559 · Granted Oct 13, 2015

Storing cached data in over-provisioned memory in response to power loss

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Quick Facts
Patent No.
US 9,158,700
App. No.
13/354,559
Filed
Jan 20, 2012
Granted
Oct 13, 2015
Kind
B2
Art Unit
2132
USPC
711/162
Abstract

A power loss condition is detected that affects volatile data that is cached in preparation for storage in a non-volatile, solid-state memory device. The volatile cached data is stored in an over-provisioned portion of the non-volatile, solid-state memory device in response to the power loss condition.

Claims (28)

1. A method comprising:

dynamically allocating logical zones within a non-volatile, solid-state memory device, each of the logical zones being differentiated based on any combination of retention, performance, and reliability constraints of physical storage to which the logical zones are mapped, the non-volatile, solid-state memory device comprising an over-provisioned portion that minimizes write amplification in the non-volatile, solid-state memory device, the over-provisioned portion being selected from one of the logical zones;

detecting a power loss condition affecting volatile data that is cached in preparation for storage in the non-volatile, solid-state memory device;

storing the volatile cached data in the over-provisioned portion of the non-volatile, solid-state memory device in response to the power loss condition; and

upon resumption of power, moving the stored cached data from the over-provisioned portion of the non-volatile, solid-state memory device to a provisioned portion of the non-volatile, solid-state memory device to thereafter free the over-provisioned portion for purposes of minimizing write-amplification.

2. The method of claim 1 , further comprising performing garbage collection on the over-provisioned portion of the non-volatile, solid-state memory device before storing the volatile cached data.

3. The method of claim 1 , wherein the non-volatile, solid-state memory device is acting as a cache for another non-volatile data storage device.

4. An apparatus comprising:

a memory interface configured to access a non-volatile, solid-state memory having an over-provisioned portion that minimizes write amplification in the non-volatile, solid-state memory device; and

a controller configured to:

dynamically allocate logical zones within the non-volatile, solid-state memory device, each of the logical zones being differentiated based on any combination of retention, performance, and reliability constraints of physical storage to which the logical zones are mapped, the over-provisioned portion being selected from one of the logical zones;

detect a power loss condition affecting the apparatus;

access cached data of a volatile memory that stores data in preparation for storage to the non-volatile, solid-state memory;

store the cached data in the over-provisioned portion in response to the power loss condition; and

upon resumption of power, move the stored cached data from the over-provisioned portion of the non-volatile, solid-state memory device to a provisioned portion of the non-volatile, solid-state memory device to thereafter free the over-provisioned portion for purposes of minimizing write-amplification.

5. The apparatus of claim 4 , wherein the controller is further configured to perform garbage collection on the over-provisioned portion of the solid-state memory before storing the cached data.

6. The apparatus of claim 4 , wherein the apparatus is acting as a cache for another non-volatile data storage device.

7. A method comprising:

dynamically allocating logical zones within a non-volatile, solid-state memory device, each of the logical zones being differentiated based on read/write access constraints and on any combination of retention, performance, and reliability constraints of physical storage to which the logical zones are mapped, the non-volatile, solid-state memory device comprising advertised and over-provisioned portions, the over-provisioned portion minimizing write amplification in the non-volatile, solid-state memory device, the non-volatile, solid-state memory device acting as a cache for a lower tier, non-volatile data storage device;

detecting an unexpected power loss condition affecting volatile data that is cached in preparation for storage in the non-volatile, solid-state memory device;

determining that the advertised portion is unable to accept the volatile data in response to the power loss condition;

in response thereto, storing the volatile cached data in an over-provisioned portion of the non-volatile, solid-state memory device, the over-provisioned portion selected from one of the logical zones; and

upon resumption of power, moving the stored cached data from the over-provisioned portion of the non-volatile, solid-state memory device to a provisioned portion of the non-volatile, solid-state memory device to thereafter free the over-provisioned portion for purposes of minimizing write-amplification.

8. The method of claim 7 , further comprising performing garbage collection on the over-provisioned portion before storing the volatile cached data.

9. The method of claim 7 , further comprising forgoing any movement of data from the non-volatile, solid-state memory device to the lower tier, non-volatile data storage device in response to the power loss condition.

10. The method of claim 1 , further comprising, while storing the volatile cached data in the over-provisioned portion, limiting access to ones of the logical zones that do not store the over-provisioned portion.

11. The method of claim 10 , wherein limiting access to the ones of the logical zones comprises changing a quality of service of at least one of the logical zones.

12. The method of claim 1 , wherein the logical zones are further differentiated by read/write access constraints.