IP Library Granted Patent US 9,294,314
Granted Patent B2
US 9,294,314 · App. 14/228,913 · Granted Mar 22, 2016

Receiver having limiter-enhanced data eye openings

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Quick Facts
Patent No.
US 9,294,314
App. No.
14/228,913
Filed
Mar 28, 2014
Granted
Mar 22, 2016
Kind
B2
Art Unit
2632
USPC
375/233
Abstract

A communication system having a receiver with a linear path and a nonlinear path. As the receiver receives a data signal, it adaptively equalizes the received signal, and amplitude-limits the equalized signal in the nonlinear path using a saturable amplifier limiter or the like. A slicer extracts data from the limited equalized received signal. In the linear path, a clock recovery circuit generates a clock signal from the equalized received signal. A delay circuit in the linear path at least partially compensates for propagation delay in the limiter. Having the clock recovery occur in other than the nonlinear path, a low jitter clock is generated. The limiter enhances the vertical opening of the data eye by increasing the rise and fall times of the limited signal, providing more noise margin for the slicer to operate with and a greater timing margin in which to sample the sliced data.

Claims (33)

1. A method of receiving a data signal in a receiver having a linear path and a nonlinear path, comprising the steps of:

recovering, from the nonlinear path, data from the received data signal;

equalizing the received data signal using an equalizer common to the linear path and the nonlinear path;

limiting, in the nonlinear path, the equalized received data signal;

delaying, in the linear path, the equalized received data signal; and

recovering, from the delayed equalized received data signal, a clock synchronized to the received data signal.

2. The method of claim 1 wherein the nonlinear path includes a limiter.

3. The method of claim 2 wherein the limiter is a saturable amplifier.

4. The method of claim 1 wherein the equalizer includes an adaptive decision feedback equalizer responsive to the recovered data and the recovered clock.

5. The method of claim 2 further comprising the step of:

delaying signals in the linear path to at least partially compensate for delay of signals by the limiter in the nonlinear path.

6. A method of receiving a data signal in a receiver having a linear path and a nonlinear path, comprising the steps of:

equalizing the received data signal using an equalizer common to the linear path and the nonlinear path;

coupling the equalized received data signal to the linear and nonlinear paths;

recovering, from the nonlinear path, data from the received data signal;

limiting, in the nonlinear path, the equalized received data signal;

delaying, in the linear path, the equalized received data signal; and

recovering from the delayed equalized received data signal, a clock synchronized to the received data signal.

7. The method of claim 6 wherein the nonlinear path includes a limiter.

8. The method of claim 7 wherein the limiter is a saturable amplifier.

9. The method of claim 6 wherein the equalizer includes an adaptive decision feedback equalizer responsive to the recovered data and the recovered clock.

10. The method of claim 6 further comprising the step of:

delaying signals in the linear path to at least partially compensate for delay of signals by the limiter in the nonlinear path.

11. A method of receiving a data signal in a receiver having an input and adapted to receive a signal from a communication channel, the method comprising the steps of:

equalizing the signal from the communication channel;

limiting, in a non-linear path, the equalized received data signal;

delaying, in a linear path, the equalized received data signal;

recovering, data from the limited equalized received data signal; and

recovering a clock from the delayed equalized received data signal.

12. The method of claim 11 wherein the step of limiting is by a saturable amplifier.

13. The method of claim 11 wherein the step of equalizing includes the step of:

adaptively equaling the input signal using a decision feedback equalizer responsive to the recovered data and the recovered clock.

14. The method of claim 11 wherein the delay in the linear path at least partially compensates for delay of signals by the step of limiting in the nonlinear path.

Assignments (10)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2014
From: MOBIN, MOHAMMAD S.; AZIZ, PERVEZ M.; LIU, YE
To: LSI CORPORATION
Reel/Frame 032552/0368 →