IP Library Granted Patent US 9,893,692
Granted Patent B2
US 9,893,692 · App. 15/352,877 · Granted Feb 13, 2018

High linearly WiGig baseband amplifier with channel select filter

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Quick Facts
Patent No.
US 9,893,692
App. No.
15/352,877
Filed
Nov 16, 2016
Granted
Feb 13, 2018
Kind
B2
Art Unit
2842
USPC
330/254
Abstract

A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

Claims (24)

1. A circuit comprising:

a Sallen-Key filter comprising a source follower that implements a unity-gain amplifier; and

a programmable-gain amplifier coupled to the Sallen-Key filter, the circuit configured to provide programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier to decouple bandwidth of the circuit from its gain settings.

2. The circuit recited in claim 1 , wherein the programmable-gain amplifier comprises a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages.

3. The circuit recited in claim 1 , configured to function as at least one of a low-pass filter, a high-pass filter, and a band-pass filter.

4. The circuit recited in claim 1 , wherein the source follower comprises a first plurality of transistors arranged in a first circuit configuration, and at least one branch within the programmable-gain amplifier comprises at least a second plurality of transistors arranged in at least a second circuit configuration, the at least second circuit configuration identical to the first circuit configuration.

5. The circuit recited in claim 4 , wherein the first and the at least second plurality of transistors have the same unit device sizes and current densities.

6. The circuit recited in claim 1 , comprising a fabrication layout that comprises a uniform array of unit devices.

7. A method for avoiding linearity dependence on operating region of transistors in an amplifier in a Sallen-Key filter, comprising:

employing a source follower in the Sallen-Key filter to provide unity gain, the source follower comprising an active device and a load device; and

selecting a DC level of an input signal to the Sallen-Key filter to ensure adequate headroom of at least one of the load device and devices in a current-mirror pair employed as a programmable-gain amplifier.

8. The method recited in claim 7 , wherein the programmable-gain amplifier comprises a differential voltage-to-current converter and programmable output gain stages.

9. The method recited in claim 7 , wherein the Sallen-Key filter is configured to function as at least one of a low-pass filter, a high-pass filter, and a band-pass filter.

10. The method recited in claim 7 , wherein the source follower comprises a first plurality of transistors arranged in a first circuit configuration, and at least one branch within the programmable-gain amplifier comprises at least a second plurality of transistors arranged in at least a second circuit configuration, the at least second circuit configuration identical to the first circuit configuration.

11. The method recited in claim 10 , wherein the first and the at least second plurality of transistors have the same unit device sizes and current densities.

12. The method recited in claim 10 , wherein each of the source follower and the programmable-gain amplifier comprises a fabrication layout comprising a uniform array of unit devices.

13. A method for fabricating an integrated circuit, comprising:

designing a transistor layout comprising an array of unit devices, the transistor layout to be common to a Sallen-Key filter and at least a programmable-gain amplifier;

sizing the transistors in the transistor layout to provide for a common unit device size and current density;

generating a design of the Sallen-Key filter and the programmable-gain amplifier to each include the transistor layout; and

fabricating the Sallen-Key filter and the programmable-gain amplifier based on the design.

14. The method recited in claim 13 , comprising designing the transistor layout to achieve compactness and provide uniform arrays of unit devices.

15. The method recited in claim 13 , wherein the programmable-gain amplifier comprises a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages.

16. The method recited in claim 13 , wherein the integrated circuit is configured to function as at least one of a low-pass filter, a high-pass filter, and a band-pass filter.