IP Library Granted Patent US 7,835,421
Granted Patent B1
US 7,835,421 · App. 07/475,079 · Granted Nov 16, 2010

Electric detector circuit

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Quick Facts
Patent No.
US 7,835,421
App. No.
07/475,079
Granted
Nov 16, 2010
Kind
B1
Abstract

A detector is provided for determining the carrier frequency of symmetrical, direct sequence, spread spectrum (DSSS) signals. The DSSS signal is divided between two signal paths, one path containing a frequency band inverter and the other a time delay unit. The outputs of the inverter and delay unit are connected to a multiplier and thence to a filter isolating the difference frequency of the inverted and non-inverted DSSS signals. The frequency inverter comprises an input band pass filter, a local oscillator, a second multiplier and a band pass filter. Frequency inversion is carried out by the multiplier and filter providing the difference signal between the local oscillator signal and the DSSS signal. The difference frequency provided by the filter is the known local oscillator frequency minus twice the DSSS carrier frequency.

Claims (12)

1. A detector for determining the carrier frequency of a symmetrical, direct sequence, spread spectrum (DSSS) signal of the kind having a frequency spectrum which is symmetrical about a suppressed carrier frequency the detector including:

(1) means for subtracting the DSSS signal from a signal having higher frequency than any frequency in the DSSS signal spectrum and for producing a frequency inversion of the DSSS signal spectrum,

(2) means for correlating the inverted and non-inverted DSSS signals at substantially zero relative time delay, and

(3) means for identifying the suppressed carrier frequency of the DSSS signal from the output of the correlating means.

2. A detector according to claim 1 wherein the means for producing frequency inversion of the DSSS signal spectrum includes a local oscillator and a first frequency mixer arranged to provide a difference signal between the local oscillator output and the DSSS signal.

3. A detector according to claim 2 including delaying means arranged to produce substantially zero relative line delay between the inverted and non-inverted DSSS signals, a second mixer arranged to multiply together the inverted and non-inverted signals, and a filter arranged to integrate the second mixer output to provide the difference frequency of the multiplied signals.

4. A detector according to claim 3 wherein the filter is a spectrum analyser.

5. A detector according to claim 3 including a third mixer and a second local oscillator arranged to provide an intermediate frequency difference signal between the DSSS signal and the second local oscillator signal, the third mixer output being connected to the means for producing frequency inversion of the DSSS signal spectrum.

6. A method of detecting the carrier frequency of a DSSS signal including the steps of:

subtracting the DSSS signal from a signal having a higher frequency than an frequency in the DSSS signal spectrum to produce DSSS signal frequency spectrum inversion;

correlating the inverted and non-inverted DSSS signals at substantially zero relative time delay; and

identifying the said carrier frequency from the correlation signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2020
From: BAGLEY, GEOFFREY CHARLES
To: THE SECRETARY OF STATE FOR DEFENCE IN HER MAJESTY'S GOVERNMENT OF THE UNITED KINGDOM OF GREAT BRITAIN AND NORTHERN IRELAND
Reel/Frame 052124/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2019
From: QINETIQ LIMITED
To: CASTLEMORTON WIRELESS LLC
Reel/Frame 051138/0162 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2014
From: THE SECRETARY OF STATE FOR DEFENCE
To: QINETIQ LIMITED
Reel/Frame 031873/0448 →