Circuit and method for modifying a region of an encoded image
View Patent ↗A video processing circuit includes a processor that receives an encoded image having first and second regions, decodes the first region of the image, modifies the decoded first region, and re-encodes the modified first region. Such a circuit allows one to modify a region of an image by decoding and re-encoding only that region instead of the entire image. For example, if one wishes to overlay an EPG on a bottom portion of a video frame, then the circuit can decode only the EPG and the bottom portion of the frame, overlay the decoded EPG on the bottom frame portion, and re-encode the overlaid bottom frame portion. Therefore, this technique often reduces the processing time, and thus the cost and complexity of the processing circuit, as compared to a circuit that decodes and re-encode the entire frame during an image overlay process.
1. A video processing circuit, comprising:
a processor operable to:
receive a signal including an overlay frame and an encoded image frame having first and second regions;
decode the overlay frame and the first region of the image frame;
modify the decoded first region of the image frame to include the decoded overlay frame; and
re-encode the modified first region of the image frame;
where the overlay frame is distinct from the encoded image frame including the first and second regions in the signal.
2. The video processing circuit of claim 1 wherein the processor is operable to combine the encoded second region of the image frame and the re-encoded first region of the image frame to generate an encoded modified image frame.
3. The video processing circuit of claim 1 wherein the processor is operable to:
decode the first region into a transform domain; and
modify the decoded first region in the transform domain.
4. The video processing circuit of claim 1 wherein the processor is operable to:
decode the first region into a pixel domain; and
modify the decoded first region in the pixel domain.
5. The video processing circuit of claim 1 wherein:
the first region has dimensions and a location within the image frame; and
the processor is operable to receive the dimensions and location of the first region within the image frame.
6. The video processing circuit of claim 1 wherein the processor is operable to:
store the re-encoded modified first region and the second region.
7. The video processing circuit of claim 6 comprising
a buffer to store the re-encoded modified first region and the second region.
8. The video processing circuit of claim 6 wherein the processor is operable to decode the first region of the image and the overlay frame by identifying motion vectors.
9. A method comprising:
receiving a video signal including an encoded image frame and an overlay frame;
decoding a first region of the encoded image having the first region and a second region;
decoding the overlay frame;
in response to an overlay command, modifying the decoded first region to include the decoded overlay frame; and
re-encoding the modified first region;
where the overlay frame is distinct from the encoded image frame including the first and second regions in the signal.
10. The method of claim 9 , further comprising combining the encoded second region of the image frame and the re-encoded first region of the image to form an encoded modified image frame.
11. The method of claim 9 wherein:
the decoding comprises decoding first region into a transform domain; and
the modifying comprises modifying the decoded first region in the transform domain.
12. The method of claim 9 wherein:
the decoding comprises decoding the first region into a pixel domain; and
the modifying comprises modifying the decoded first region in the pixel domain.
13. The method of claim 9 comprising
storing the re-encoded modified first region and the second region.
14. The method of claim 9 including re-encoding the modified first region responsive to rate controlling.