IP Library Granted Patent US 6,839,387
Granted Patent B1
US 6,839,387 · App. 09/517,113 · Granted Jan 4, 2005

Self-dithering sigma-delta converter and communication device incorporating same

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Quick Facts
Patent No.
US 6,839,387
App. No.
09/517,113
Granted
Jan 4, 2005
Kind
B1
Abstract

A sigma-delta converter operates over a predetermined bandwidth and includes a feedback loop comprising a forward path and a feedback path. The forward path includes, in series, a summer, a filter, and a comparator. The comparator produces an output signal that is fed back to a negative input of the summer via the feedback path. The sigma-delta converter also includes at least one instability generator positioned in the forward path and/or the feedback path. The instability generator generates one or more out-of-band instabilities in the feedback loop to substantially improve the in-band signal-to-noise performance of the converter for input signal amplitudes near a low end of the converter's dynamic range. The converter may be employed as an A/D converter, a D/D converter, or a D/A converter in a receiver and/or a transmitter of a wireless communication device.

Claims (81)

1. A sigma-delta converter that includes a feedback loop and operates over a predetermined bandwidth, the sigma-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a filter for averaging the first signal to produce a second signal;

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison; and

a storage device, coupled to an output of the comparator, for storing the third signal for a delay period and outputting the third signal responsive to a clock signal, the storage device comprising a D flip-flop that outputs the third signal responsive to the clock signal;

a feedback path providing a representation of the third signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the third signal from an input signal applied to a positive input of the summer; and

at least one instability generator, positioned in the forward path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter, the at least one instability generator including a D flip-flop coupled to an output of the storage device to produce a time-delayed representation of the third signal responsive to the clock signal.

2. The sigma-delta converter of claim 1 , wherein sigma-delta converter provides a bandpass frequency response and wherein the storage device comprises:

a first D flip-flop coupled to an output of the comparator and producing an intermediate signal at a non-inverting output responsive to the clock signal; and

a second D flip-flop coupled to the non-inverting output of the first D flip-flop and outputting the third signal at an inverting output responsive to the clock signal.

3. The sigma-delta converter of claim 2 , wherein the at least one instability generator comprises at least a third D flip-flop positioned in the forward path and coupled to the inverting output of the second D flip-flop to produce a time-delayed representation of the third signal responsive to the clock signal.

4. The sigma-delta converter of claim 1 , wherein the at least one instability generator comprises a capacitor.

5. A sigma-delta converter that includes a feedback loop and operates over a predetermined bandwidth, the sigma-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a filter for averaging the first signal to produce a second signal; and

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison;

a feedback path providing a representation of the third signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the third signal from an input signal applied to a positive input of the summer; and

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter,

wherein the at least one instability generator comprises:

a first D flip-flop responsive to a first edge of a clock signal; and

a second D flip-flop coupled to an output of the first D flip-flop and responsive to a second edge of the clock signal.

6. A sigma-delta converter that includes a feedback loop and operates over a predetermined bandwidth, the sigma-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a second summer for receiving a signal for conversion from a signal source and producing an intermediate signal;

a filter for averaging the first signal to produce a second signal;

a second filter, coupled between the summer and the second summer, for averaging the intermediate signal to produce the input signal; and

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison;

a feedback path providing a representation of the third signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the third signal from an input signal applied to a positive input of the summer;

a second feedback path providing the representation of the third signal to a negative input of the second summer, wherein the second summer produces the intermediate signal by subtracting the representation of the third signal from the signal for conversion; and

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter,

wherein an instability generator of the at least one instability generator is positioned in the second feedback path.

7. An improved sigma-delta converter of the type having at least one feedback loop and operating over a predetermined bandwidth, the at least one feedback loop including a forward path and a feedback path, wherein the improvement comprises:

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the at least one feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of an input signal that are substantially near a low end of a dynamic range of the sigma-delta converter, the at least one instability generator including a first D flip-flop responsive to a first edge of a clock signal, and a second D flip-flop coupled to an output of the first D flip-flop and responsive to a second edge of the clock signal.

8. A communication device comprising:

(a) an antenna for receiving a radio signal bearing information;

(b) a receiver, coupled to the antenna, for down-converting and demodulating the radio signal, the receiver including a sigma-delta converter that includes a feedback loop and operates over a predetermined bandwidth, the sigma-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a filter for averaging the first signal to produce a second signal;

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison; and

a storage device for storing the third signal for a delay period and outputting the third signal responsive to a clock signal to produce a clocked output signal, wherein the storage device comprises a D flip-flop that produces the clocked output signal responsive to the clock signal;

a feedback path providing a representation of the clocked output signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the clocked output signal from a representation of the radio signal applied to a positive input of the summer; and

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter, and wherein the at least one instability generator comprises at least one D flip-flop positioned in the forward path of the feedback loop and coupled to an output of the storage device to produce a time-delayed representation of the clocked output signal responsive to the clock signal;

(c) a clock generator, coupled to the receiver, for generating the clock signal; and

(d) a processor, coupled to the receiver, for decoding and processing the information.

9. The communication device of claim 8 , further comprising:

a user input device, coupled to the processor, for receiving user information, wherein the processor encodes the user information; and

a transmitter, coupled to the processor and the antenna, for modulating and upconverting the user information into a transmission signal for transmission from the antenna.

10. A communication device comprising:

(a) an antenna for receiving a radio signal bearing information;

(b) a receiver, coupled to the antenna, for down-converting and demodulating the radio signal, the receiver including a sigma-delta converter that includes a feedback loop and operates over a predetermined bandwidth, the sign-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a filter for averaging the first signal to produce a second signal;

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison; and

a storage device for storing the third signal for a delay period and outputting the third signal responsive to a clock signal to produce a clocked output signal;

a feedback path providing a representation of the clocked output signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the clocked output signal from a representation of the radio signal applied to a positive input of the summer; and

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter;

wherein the at least one instability generator comprises:

a first D flip-flop responsive to a first edge of the clock signal; and

a second D flip-flop coupled to an output of the first D flip-flop and responsive to a second edge of the clock signal,

(c) a clock generator, coupled to the receiver, for generating the clock signal; and

(d) a processor, coupled to the receiver, for decoding and processing the information.

11. A communication device comprising:

(a) an antenna for receiving a radio signal bearing information;

(b) a receiver, coupled to the antenna, for down-converting and demodulating the radio signal, the receiver including a sigma-delta converter that includes a feedback loop, operates over a predetermined bandwidth, and provides a bandpass frequency response, the sigma-delta converter comprising:

a forward path including:

a summer for generating a first signal;

a filter for averaging the first signal to produce a second signal;

a comparator for comparing the second signal to a reference level and producing a third signal based on the comparison; and

a storage device for storing the third signal for a delay period and outputting the third signal responsive to a clock signal to produce a clocked output signal, wherein the storage device comprises:

a first D flip-flop coupled to an output of the comparator and producing an intermediate signal at a non-inverting output responsive to the clock signal; and

a second D flip-flop coupled to the non-inverting output of the first D flip-flop and producing the clocked output signal at an inverting output responsive to the clock signal;

a feedback path providing a representation of the clocked output signal to a negative input of the summer, wherein the summer generates the first signal by subtracting the representation of the clocked output signal from a representation of the radio signal applied to a positive input of the summer; and

at least one instability generator, positioned in at least one of the forward path and the feedback path, for generating an instability in the feedback loop at a frequency outside the predetermined bandwidth to substantially improve signal-to-noise performance of the sigma-delta converter within the predetermined bandwidth for amplitudes of the input signal that are substantially near a low end of a dynamic range of the sigma-delta converter;

wherein the at least one instability generator comprises at least a third D flip-flop positioned in the forward path of the feedback loop and coupled to the inverting output of the second D flip-flop to produce a time-delayed representation of the clocked output signal responsive to the clock signal;

(c) a clock generator, coupled to the receiver, for generating the clock signal; and

(d) a processor, coupled to the receiver, for decoding and processing the information.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2014
From: MOTOROLA MOBILITY LLC
To: GOOGLE TECHNOLOGY HOLDINGS LLC
Reel/Frame 034490/0001 →
CHANGE OF NAME Recorded Oct 2, 2012
From: MOTOROLA MOBILITY, INC.
To: MOTOROLA MOBILITY LLC
Reel/Frame 029216/0282 →