Frequency shifting circuit and method

1. A digital circuit for shifting a frequency band of a signal vector to a predetermined frequency band, wherein the signal vector is determined by a pair of I (in-phase) and Q (quadrature) components on I-Q plane, comprising:

a control data generator for generating control data from a frequency difference between the frequency band and the predetermined frequency band including a phase data generator for generating phase data from the frequency difference;

a signal vector rotator for rotating the signal vector on the I-Q plane by an angle determined depending on the control data to produce an output signal vector in the predetermined frequency band;

an analog-to-digital converter for converting a received analog signal vector to the signal vector according to a predetermined sampling clock,

wherein the control data generator comprises;

the phase data generator for generating the phase data from the frequency difference in synchronization with the predetermined sampling clock; and

a converter for converting the phase data to the control data consisting of a plurality of control bits, and

wherein the signal vector rotator comprises;

a plurality of partial rotators which are connected in series in descending order of a rotation angle, wherein each of the partial rotators receives a different bit of the control bits of the control data and rotates an output of a previous stage by a predetermined angle depending on a corresponding control bit received from the converter.

2. A digital circuit for shifting a plurality of frequency bands of input signal vectors to a predetermined center frequency band to produce an output signal vector for each frequency band, wherein each of the input signal vectors is determined by a pair of I (in-phase) and Q (quadrature) components on I-Q plane, comprising:

an analog-to-digital converter for converting analog signal vectors to the input signal vectors according to a predetermined sampling clock;

a control data generator for generating control data from a frequency difference between each of the plurality of frequency bands and the predetermined center frequency band including a phase data generator for generating phase data from the frequency difference;

a signal vector rotator corresponding to each of the plurality of frequency bands, for rotating the input signal vectors on the I-Q plane by an angle determined depending on corresponding control data to shift the frequency bands of the input signal vectors to the predetermined center frequency band;

a band-pass filter corresponding to the signal vector rotator, for receiving an output of the signal vector rotator and passing an output signal vector of the predetermined center frequency band;

wherein the control data generator comprises:

the phase data generator for generating the phase data Φ from the frequency difference in synchronization with the predetermined sampling clock; and

a converter for converting the phase data Φ to the control data D consisting of a plurality of control bits D k , where −1<k<m−2 (m is a positive integer),

wherein the phase data generator generates the phase data Φ by computing an integral multiple of a unit angle Δ which is obtained from a frequency shift δ per period of the predetermined sampling clock, wherein the unit angle Δ is represented by 360°×δ, wherein the frequency shift δ is obtained by dividing the frequency difference by a frequency of the predetermined sampling clock and is represented in form of RN/2 m (RN is a rational number).

3. The digital circuit according to claim 2 , wherein the converter performs a conversion operation according to the following steps:

Step 1) k=−1 and Φ k =Φ;

Step 2) D k =sign bit of Φ k ;

Step 3) if k=m−2, then exit, else go to step 4);

Step 4) Φ k+1 =Φ k −θ k when D k =0, and

Φ k+1 =Φ k +θ k when D k =1, where θ k =arctan (2 −k );

Step 5) k=k+1; and

Step 6) go to step 3).

4. The digital circuit according to claim 3 , wherein the signal vector rotator comprises:

a plurality of partial rotators R k which are connected in series in descending order of a rotation angle, wherein the partial rotators R k receive the control bits D k , respectively, and each of the partial rotators R k rotates an output of a previous stage R k−1 by a predetermined angle depending on a corresponding control bit received from the converter.

5. The digital circuit according to claim 4 , wherein

a first partial rotator R 1 rotates an input signal vector (I in , Q in ) by an angle θ −1 to produce a first output signal vector (I out,−1 , Q out,−1 ) as follows:

I out,−1 =D −1 =Q in ; and

Q out,−1 =−D −1 ×I in ,

each of partial rotators R k (0<k≦m−2) rotates an input signal vector (I in,k , Q in,k ) by an angle θ k to produce an output signal vector (I out,k , Q out,k ) as follows:

I out,k =I in,k +2 −k ×D k ×Q in ; and

Q out,k =−2 k ×D k ×I in,k +Q in,k ,

where D k uses numerical value representation such that a numerical value “1” is represented by a logical value “1” and a numerical value “−1” is represented by a logical value “0”.

6. The digital circuit according to claim 4 , wherein the signal vector rotator rotates an input signal vector (I in , Q in ) having an absolute value Z in by an angle θ while the absolute value Z in becomes Z out , where θ and Z out are represented as follows:

Θ

=

D

-

1

×

90

⁢

°

+

∑

k

=

0

m

-

2

⁢

⁢

D

k

·

arctan

⁡

(

2

-

k

)

⁢

⁢

and

Zout

=

Zin

∏

k

=

0

m

-

2

⁢

⁢

cos

⁢

⁢

θ

k

.