Slip resistant horizontal semiconductor wafer boat
View Patent ↗A horizontal wafer boat for maintaining semiconductor wafers during wafer processing is disclosed. The wafer boat is configured to reduce the likelihood wafer slip when wafers are heated to processing temperatures of about 1000° C. and above.
1. A wafer boat combination comprising a wafer boat and a plurality of a semiconductor wafers, the wafer boat comprising:
a first end and a second end;
a plurality of slots positioned between the first and the second ends, the semiconductor wafers being respectively received in the plurality of slots, each of the plurality of slots comprising first and second upper support guides to maintain the semiconductor wafers in a vertical orientation; and
a lower grooved portion for supporting a plurality of wafers, the wafer boat having an inner radius originating from a centerpoint, the slots extending generally along an arc having a radius of curvature corresponding to the inner radius, wherein the lower grooved portion has a generally arcuate and concave contour as viewed from the centerpoint, and wherein at semiconductor processing temperatures of between approximately 1000° C. to 1400° C., the lower grooved portion substantially conforms to the portion of the wafer supported thereon.
2. The wafer boat combination of claim 1 , wherein the wafer boat comprises silicon carbide.
3. The wafer boat combination of claim 2 , wherein the silicon carbide is recrystallized silicon carbide.
4. The wafer boat combination of claim 1 , wherein semiconductor wafers have a diameter of about 300 mm.
5. The wafer boat combination of claim 1 , wherein an angle α in the range of 10–80 degrees is defined between (i) a first radius of a wafer of the plurality of wafers extending from the center of said wafer to the periphery of said wafer proximate the first upper guides, and (ii) a second radius extending vertically downward from the center of said wafer to a point on the periphery of the wafer which corresponds to the center of the lower portion.
6. The wafer boat combination of claim 5 , wherein the angle αis approximately 37 degrees.
7. The wafer boat combination of claim 1 , wherein the plurality of slots between the first and second ends of said boat are configured to support up to 25 semiconductor wafers.
8. The wafer boat combination of claim 1 , wherein the wafer boat has a thickness of not less than 5 mm.
9. The wafer boat combination of claim 1 , wherein the plurality of slots are spaced apart from each other at a constant spacing, such that the plurality of wafers are spaced apart from each other at said constant spacing.