IP Library Granted Patent US 6,885,900
Granted Patent B1
US 6,885,900 · App. 09/613,344 · Granted Apr 26, 2005

Method and apparatus for providing multiple channel audio in a computing system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,885,900
App. No.
09/613,344
Granted
Apr 26, 2005
Kind
B1
Abstract

A method and apparatus for providing multiple channel audio in a computing system includes processing that begins by receiving an audio setup signal that indicates whether audio is to be outputted as stereo audio or multiple channel audio. When multiple channel audio is to be outputted, the line-in driver is disabled in the audio processing circuitry and the multiple channel driver of the audio processing circuitry is enabled. Thus, the multiple channel driver is operably coupled to the line-in audio jack. When the audio output is to be outputted as stereo audio, the multiple channel driver is disabled and the line-in driver is enable. Thus, the line-in driver is operably coupled to the line-in audio jack.

Claims (70)

1. A method for providing multiple channel audio in a computing system, the method comprises the steps of:

receiving an audio setup signal that indicates whether audio is to be outputted as stereo audio or multiple channel audio having more than two audio output channels;

when the multiple channel audio is to be outputted, disabling a line-in driver such that a multiple channel driver is operably coupled to an audio jack; and

when the stereo audio is to be outputted, disabling the multiple channel driver such that the line-in driver is operably coupled to the audio jack.

2. The method of claim 1 , wherein the step of receiving the audio setup signal further comprises:

receiving line-in driver setting information and multiple channel driver setting information;

storing the line-in driver setting information in a line-in driver register; and

storing the multiple channel driver setting information in a multiple channel register.

3. The method of claim 1 , wherein the disabling the line-in driver further comprises muting the line-in driver.

4. The method of claim 1 , wherein the disabling the multiple channel driver further comprises placing the multiple channel driver in a high impedance state.

5. An audio codec comprising:

an input/output interface operably coupled to receive and transmit digitized audio data;

an audio setting register that stores audio setting information contained in the digitized audio data;

a line-in driver operably coupled to an external audio jack when the audio setting information indicates stereo audio operation and is disabled when the audio setting information indicates multiple channel audio operation wherein said multiple channel audio operation involves more than two audio output channels; and

a multiple channel driver operably coupled to the external audio jack when the audio setting information indicates multiple channel audio operation and is disabled when the audio setting information indicates stereo audio operation.

6. The audio codec of claim 5 , wherein the audio setting register further comprises:

multiple channel register that stores multiple channel setting information of the audio setting information; and

a line-in register that stores line-in setting information of the audio setting information.

7. The audio codec of claim 5 , wherein the multiple channel driver further comprises:

a left channel driver;

a right channel driver; and

a disabling circuit operably coupled to the left channel driver and the right channel driver, wherein the disabling circuit disables the left channel driver and the right channel driver when the audio setting information indicates stereo operation.

8. The audio codec of claim 7 , wherein the disabling circuit causes the left and right channel drivers to have a high impedance with respect to the external audio jack when the audio setting information indicates the stereo operation.

9. An audio codec comprises:

a processing module; and

memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to:

receive an audio setup signal that indicates whether audio is to be outputted as stereo audio or multiple channel audio having more than two audio output channels;

when the multiple channel audio is to be outputted, disable a line-in driver such that a multiple channel driver is operably coupled to an audio jack; and

when the stereo audio is to be outputted, disable the multiple channel driver such that the line-in driver is operably coupled to the audio jack.

10. The audio codec of claim 9 , wherein the memory further comprises operational instructions that cause the processing module to receive the audio setup signal by:

receiving line-in driver setting information and multiple channel driver setting information;

storing the line-in driver setting information in a line driver register; and

storing the multiple channel driver setting information in a multiple channel register.

11. The audio codec of claim 9 , wherein the memory further comprises operational instructions that cause the processing module to disable the line-in driver by muting the line in driver.

12. The audio codec of claim 9 , wherein the memory further comprises operational instructions that cause the processing module to disable the multiple channel driver by placing the multiple channel driver in a high impedance state.

13. A method for providing multiple channel audio in a computing system, the method comprises the steps of:

receiving an audio setup signal that indicates whether audio is to be outputted as stereo audio or multiple channel audio having more than two audio output channels;

when the multiple channel audio is to be outputted, disabling a microphone driver such that a multiple channel driver is operably coupled to an audio jack; and

when the stereo audio is to be outputted, disabling the multiple channel driver such that the microphone driver is operably coupled to the audio jack.

14. The method of claim 13 , wherein the step of receiving the audio setup signal further comprises:

receiving microphone driver setting information and multiple channel driver setting information;

storing the microphone driver setting information in a microphone driver register; and

storing the multiple channel driver setting information in a multiple channel register.

15. The method of claim 13 , wherein the disabling the microphone driver further comprises muting the microphone.

16. The method of claim 13 , wherein the disabling the multiple channel driver further comprises lacing the multiple channel driver in a high impedance state.

17. An audio codec comprising:

an input/output interface operably coupled to receive and transmit audio data;

an audio setting register that stores audio setting information contained in the audio data;

a microphone driver operably coupled to an external audio jack when the audio setting information indicates stereo audio operation and is disabled when the audio setting information indicates multiple channel audio operation wherein said multiple channel audio operation involves more than two audio output channels; and

a multiple channel driver operably coupled to the external audio jack when the audio setting information indicates multiple channel audio operation and is disabled when the audio setting, information indicates stereo audio operation.

18. The audio codec of claim 17 , wherein the audio setting register further comprises:

multiple channel register that stores multiple channel setting information of the audio setting information; and

a microphone register that stores microphone setting information of the audio setting information.

19. The audio codec of claim 17 , wherein the multiple channel driver further comprises:

a left channel driver;

a right channel driver; and

a disabling circuit operably coupled to the left channel driver and the right channel driver, wherein the disabling circuit disables the left channel driver and the right channel driver when the audio setting information indicates stereo operation.

20. The audio codec of claim 19 , wherein the disabling circuit causes the left and right channel drivers to have a high impedance with respect to the external audio jack when the audio setting information indicates the stereo operation.

21. An audio codec comprises:

a processing module; and

memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to:

receive an audio setup signal that indicates whether audio is to be outputted as stereo audio or multiple channel audio having more than two audio output channels;

when the multiple channel audio is to be outputted, disable a microphone driver such that a multiple channel driver is operably coupled to an audio jack; and

when the stereo audio is to be outputted, disable the multiple channel driver such that the microphone driver is operably coupled to the audio jack.

22. The audio codec of claim 21 , wherein the memory further comprises operational instructions that cause the processing module to receive the audio setup signal by:

receiving microphone driver setting information and multiple channel driver setting information;

storing the microphone driver setting information in a microphone driver register; and

storing the multiple channel driver setting information in a multiple channel register.

23. The audio codec of claim 21 , wherein the memory further comprises operational instructions that cause the processing module to disable the microphone driver by muting the microphone driver.

24. The audio codec of claim 21 , wherein the memory further comprises operational instructions that cause the processing module to disable the multiple channel driver by placing the multiple channel driver in a high impedance state.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Jun 6, 2017
From: SILICON VALLEY BANK
To: TEMPO SEMICONDUCTOR, INC.
Reel/Frame 042614/0869 →
SECURITY INTEREST Recorded Feb 18, 2015
From: TEMPO SEMICONDUCTOR, INC.
To: SILICON VALLEY BANK
Reel/Frame 035033/0681 →
RELEASE OF SECURITY INTEREST Recorded Feb 18, 2015
From: SILICON VALLEY BANK
To: TEMPO SEMICONDUCTOR, INC.
Reel/Frame 035052/0216 →
CHANGE OF NAME Recorded Apr 13, 2014
From: STRAVELIS, INC.
To: TEMPO SEMICONDUCTOR, INC.
Reel/Frame 032672/0966 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2014
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: STRAVELIS,INC.
Reel/Frame 032662/0007 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2008
From: SIGMATEL, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 020828/0913 →
SECURITY AGREEMENT Recorded Mar 8, 2004
From: SIGMATEL, INC.
To: SILICON VALLEY BANK
Reel/Frame 015074/0385 →
SECURITY INTEREST Recorded Apr 25, 2001
From: SIGMATEL, INC.
To: SILICON VALLEY BANK
Reel/Frame 011763/0608 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2000
From: RYBICKI, MATTHEW A.; RANGAN, GIRI N.K.; IFESINACHUKWA, KENNETH G.
To: SIGMATEL, INC.
Reel/Frame 011161/0475 →