Granted Patent B1

US 7,054,324 · App. 09/663,511 · Granted May 30, 2006

Assignee: CIENA Corporation

Abstract

Claims (42)

1. An interface unit in a switch device, the switch device being one of a plurality of switch devices that are communicatively connected via a backplane, the interface unit comprising:

a receiving unit configured to receive data frames from a communication channel on the backplane at predetermined intervals and generate interrupt signals in response to detected data changes that occur between consecutively received data frames, the backplane being used to distribute the data frames among the plurality of switch devices;

a transferring unit configured to transfer the interrupt signals to a processing unit in the switch device for controlling protection switching in a corresponding network;

a comparing unit configured to perform a bit-by-bit comparison between consecutively received data frames, the comparing unit being configured to generate an interrupt signal for the data signal if the bit-by-bit comparison determines an inequality between corresponding bits of the consecutively received data frames,

wherein at least one of the consecutively received data frames, which is received prior to the other of the consecutively received data frames, is sent to the comparing unit;

wherein the comparing unit is configured to generate an interrupt status signal for a particular received data frame as a result of the bit-by-bit comparison, the interrupt status signal including a unit status bit for each of the corresponding bits in the consecutively received data frames,

and, if the bit-by-bit comparison determines an inequality between any of the corresponding bits in the consecutively received data frames, the interrupt signal is generated;

wherein the switch device is a switch card communicatively connected to a plurality of other switch cards via the backplane, and

the comparing unit is configured to perform the bit-by-bit comparison for consecutively received data frames from each of the other switch cards, thereby generating an interrupt status signal for each of the other switch cards;

wherein the receiving unit further comprises a massive interrupt signal generator configured to receive the interrupt status signal generated for each of the other switch cards, and generate a massive interrupt signal based on the received interrupt status signals, the massive interrupt signal indicating whether an interrupt signal has been generated for any of the plurality of other switch cards based on the most recent bit-by-bit comparison for each of the other switch cards; and

wherein the received data frames include switching event bytes and status bytes, and

the generated interrupt signals are assembled into a memory map, which is used by the processing unit to navigate among a plurality of memory locations to find a particular one of the switching event bytes and status bytes giving rise to the massive interrupt signal.

2. The interface unit of claim 1 , further comprising:

a storage device configured to store the received data frames.

3. The interface unit of claim 2 , wherein the storage device is at least one of a random access memory (RAM), a dual port RAM, and a field-programmable gate array (FPGA).

4. The interface unit of claim 1 , wherein the generated serial data signals include status bytes and Synchronous Optical Network (SONET) bytes including K1, K2, E1, and F1 bytes transferred as a serial bit stream at a rate of substantially 4.32 Megahertz.

5. The interface unit of claim 1 , wherein the interface unit is configured to generate and transfer each of the interrupt signals to the processing unit in response to switching event information in the received data frames.

6. The interface unit of claim 5 , wherein:

the receiving unit generates interrupt signals that are suitable to be used in generating one or more memory maps, and

protection switching is controlled by the processing unit navigating among a plurality of memory locations using the memory maps in response to the transferred interrupt signal, reading data relating to the switching event information from the memory locations, and evaluating the switching event information.

7. The interface unit of claim 1 , wherein the transferring unit is communicatively connected to a multiple-channel backplane, the receiving unit being configured to receive the data frames from at least one channel on the multiple-channel backplane.

8. The interface unit of claim 1 , wherein the processing unit comprises a plurality of processors in the switching device, and the transferring unit is configured to transfer the interrupt signals to the plurality of processors.

9. The interface unit of claim 1 , wherein the backplane is configured for serial data communications, and the interface unit further comprises:

a data serializer configured to convert data into serial data frames, and transmit the serial data frames over the backplane at the predetermined intervals.

10. The interface unit of claim 1 , wherein the backplane is configured for serial data communications, and the receiving unit further comprises:

a data deserializer configured to receive the data frames as serial data, and convert the serial data into parallel data to be processed by the comparing unit.

11. The interface unit of claim 1 , wherein:

the comparing unit is configured to generate the interrupt status signal for the particular received data frame as a result of the bit-by-bit comparison, the interrupt status signal including a the unit status bit for each of the corresponding bits in the consecutively received data frames,

and, if the bit-by-bit comparison determines an inequality between any of the corresponding bits in the consecutively received data frames, the interrupt signal is generated as a logic value set in the corresponding unit status bit in the interrupt status signal.

12. An interface unit in a switch card communicatively connected to a plurality of other switch cards via a backplane, the interface unit comprising:

a receiving unit configured to receive control frames from a channel on the backplane at predetermined intervals and generate interrupt signals in response to detected data changes that occur between consecutively received control frames;

a transferring unit configured to transfer the interrupt signals to a processing unit in the switch card for controlling protection switching in a corresponding network,

wherein each of the received control frames contains switching event or card status information of one of the other switch cards associated with the backplane channel;

a comparing unit for comparing each data bit in the consecutively received control frames in order to detect an inequality,

wherein generated interrupt signals indicate the data bit corresponding to each inequality detected by the comparing unit:

wherein the backplane includes multiple channels, each channel being associated with one of the plurality of other switch cards, and

the receiving unit is configured to:

receive control frames from the plurality of other switch cards via the backplane;

use the comparing unit to detect an inequality in the consecutively received control frames from each of the plurality of other switch cards; and

generate a massive interrupt signal indicating the existence of any detected inequality for any of the plurality of other switch cards; and

wherein the received control frames include switching event bytes and status bytes, and

the generated interrupt signals are assembled into a memory map, which is used by the processing unit to navigate among a plurality of memory locations to find a particular one of the switching event bytes and status bytes giving rise to the massive interrupt signal.

Assignments (8)