IP Library Granted Patent US 6,853,526
Granted Patent B1
US 6,853,526 · App. 09/668,181 · Granted Feb 8, 2005

Transient overvoltage protection circuit

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Quick Facts
Patent No.
US 6,853,526
App. No.
09/668,181
Granted
Feb 8, 2005
Kind
B1
Abstract

A circuit and method are disclosed for protecting an integrated circuit (IC) against transient overvoltages. The circuit comprises a balun transformer and a normally-off transistor. The balun input terminals are connected to an unbalanced circuit, while the balun output terminals are connected to a balanced circuit. The transistor is connected between the balun output terminals and has a gate connected to ground or to some other reference voltage. When an overvoltage transient signal reaches the balun input terminals, the balun transformer converts the transient to a balanced transient signal on the two branches of the balanced circuit. During overvoltage conditions, one balun output terminal will have a voltage which swings low enough that the protection transistor turns on, effectively shorting the overvoltage spike and protecting any upstream (or downstream) IC components from damage. When the transient is over, the transistor returns to the “off” state.

Claims (19)

1. A transient overvoltage protection circuit, comprising:

a. a normally-off bidirectional transistor having a first output terminal coupled to a first signal branch of a balanced circuit, a second output terminal coupled to a second signal branch of the balanced circuit, and a control terminal connected to a reference voltage;

wherein a balanced overvoltage transient signal present on the first and second signal branches of the balanced circuit causes said bidirectional transistor to become conductive and to shunt the balanced transient from said first output terminal to said second output terminal.

2. The transient overvoltage protection circuit of claim 1 , further comprising:

a. a balun transformer, having a pair of input terminals capable of receiving an unbalanced transient signal and a pair of output terminals connected to the first and second signal branches of the balanced circuit,

wherein said balun transformer converts an unbalanced overvoltage transient signal appearing at its input terminals to a balanced overvoltage transient signal appearing at its output terminals.

3. The circuit according to claim 1 or 2 wherein said bidirectional transistor is one of a MESFET, MOSFET, JFET, or HFET.

4. The circuit according to claim 1 or 2 wherein said bidirectional transistor is one of a BJT or an HBT.

5. The circuit according to claims 1 or 2 , additionally comprising:

a. a resistor inserted between said control terminal and said reference voltage.

6. The circuit according to claims 1 or 2 , additionally comprising:

a. a first bias impedance coupled between said first output terminal of said bidirectional transistor and a first bias voltage source; and

b. a second bias impedance coupled between said second output terminal of said bidirectional transistor and a second bias voltage source;

c. a first capacitor coupled between said first output terminal of said bidirectional transistor and one of the pair of said balun output terminals; and

d. a second capacitor coupled between said second output terminal of said bidirectional transistor and the other of the pair of said balun output terminals.

7. A method for protecting a circuit against overvoltage transients, comprising the step of:

a. coupling a balanced transient signal to a first output terminal and a second output terminal of a bidirectional transistor which has a control terminal coupled to a reference voltage;

wherein said balanced transient signal causes said bidirectional transistor to become conductive and to shunt said balanced overvoltage transient signal from said first output terminal to said output terminal of said bidirectional transistor.

8. The method of claim 7 , further comprising the step of first converting an unbalanced overvoltage transient signal to a balanced transient signal.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →