High gain detector amplifier with enhanced dynamic range for single photon read-out of photodetectors
View Patent ↗An ultra-low noise, high gain interface pixel amplifier is provided with capability for single-photon readout of standard photodetectors at high electrical bandwidths for diverse spectral bandpass from the x-ray to long IR bands. The detector charge modulates a source follower whose output is double sampled to remove correlated noise by a compact stage that also provides optimum level shift for subsequent amplification of the full signal excursion. The level-shifted signal finally drives a compact amplifier that generates a robust end-to-end transimpedance. Single-photon readout of photodetectors at high electrical bandwidths in small pixel areas is thereby facilitated.
1. A single photon read-out circuit comprising:
a feed-back enhanced reset amplifier, the amplifier comprising a detector reset transistor;
a photodetector connected to an output of the reset amplifier; and
a high-gain amplifier connected to the photodetector, the high-gain amplifier comprising:
a current source transistor connected to the photodetector;
an adaptive skimming circuit having an integration capacitor; and
a pixel reset transistor connected to the current source transistor and the adaptive skimming circuit.
2. The circuit of claim 1 , further comprising a source follower transistor connected to the current source transistor.
3. The circuit of claim 2 , wherein the reset amplifier further comprises a CMOS inverter.
4. The circuit of claim 3 , further-comprising a sample-and-hold transistor and a sample-and-hold capacitor connected between the current source transistor and the source follower transistor.
5. The circuit of claim 1 , wherein the reset amplifier further comprises an autozero transistor, a first capacitor, and a second capacitor.
6. The circuit of claim 4 , wherein the high-gain amplifier further comprises a current source shared by all pixels on a bus.
7. The circuit of claim 6 , wherein the reset amplifier further comprises a current source shared by all pixels on a bus.
8. A focal plane array (FPA) having a plurality of pixel cells, each pixel cell comprising:
a feed-back enhanced reset amplifier, the feed-back amplifier comprising:
a CMOS inverter; and
a photodetector reset transistor connected to the CMOS inverter;
a photodetector connected to an output of the reset amplifier; and
a high-gain amplifier connected to the photodetector, the high-gain amplifier comprising:
a current source transistor connected to photodetector;
a pixel reset transistor connected to the current source transistor; and
an adaptive skimming circuit having an integration capacitor;
wherein the reset amplifier reduces kTC noise, and the high-gain amplifier nulls current associated with the photodetector to reduce signal non-uniformity.
9. A single photon read-out circuit comprising:
a detector;
a detector reset transistor having a drain connected to the detector;
an inverter amplifier connected between the drain of the reset transistor and a source of the reset transistor;
a current source transistor having a gate connected to the detector;
a pixel reset transistor having a drain connected to the current source transistor; and
an adaptive skimming circuit connected to the current source transistor and the pixel reset transistor, the adaptive skimming circuit comprising an integration capacitor.
10. The circuit of claim 9 , further comprising a sample-and-hold transistor and a sample-and-hold capacitor connected to the current source transistor and the adaptive skimming circuit.
11. The circuit of claim 10 , further comprising a source follower transistor having a source connected to sample-and-hold transistor.
12. The circuit of claim 9 , further comprising a first capacitor connected between the drain of the reset transistor and the photodetector, and a second capacitor connected between the source of the reset transistor and photodetector.
13. The circuit of claim 9 , further comprising a current source, shared by all pixels on a bus, connected to the reset transistor and the inverter amplifier.