IP Library Granted Patent US 7,406,681
Granted Patent B1
US 7,406,681 · App. 09/686,628 · Granted Jul 29, 2008

Automatic conversion of source code from 32-bit to 64-bit

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Quick Facts
Patent No.
US 7,406,681
App. No.
09/686,628
Granted
Jul 29, 2008
Kind
B1
Abstract

In accordance with methods and systems consistent with the present invention, a system that automatically generates 32-bit to 64 bit interfaces to 64-bit code is provided. These interfaces provide for the use of optional parameters and, because they are written in 64-bit code, also allow for parameter checking. These interfaces are automatically generated to allow a programmer to maintain compatibility with 64-bit libraries from 32-bit source code.

Claims (61)

1. A method in a data processing system, comprising the steps of:

receiving 32-bit source code;

generating, from the 32-bit source code, a 32-bit interface file including statements describing characteristics of parameters in the 32-bit source code, wherein generating a 32-bit interface file includes invoking an interface generator that:

scans the 32-bit source code and creates the interface file according to a definition; and

adds to the interface file the statements describing characteristics of the parameters by parsing the 32-bit source code; and

automatically generating, based on the statements in the 32-bit interface file, a 32-bit to 64-bit conversion stub that is used by the 32-bit source code to invoke 64-bit code, wherein automatically generating a 32-bit to 64-bit conversion stub includes invoking a stub generator that:

reads the 32-bit interface file to populate a hash table with information identifying the parameters in the interface file;

re-reads the 32-bit interface file to populate the hash table with information indicating processing that occurs for the statements in the interface file; and

generates the 32-bit to 64-bit conversion stub using the hash table.

2. The method of claim 1 , wherein the 32-bit source code includes at least one of an integer parameter and a logical parameter and wherein generating a 32-bit interface includes:

determining whether the at least one of an integer and logical parameter has input directionality, output directionality, or input and output directionality; and

inserting into the 32-bit interface file code generator statements corresponding to the determined directionality of the at least one parameter.

3. The method of claim 1 , wherein generating a 32-bit interface file includes:

adding to the interface file statements indicating a number of dimensions of at least one parameter and a number of elements in each dimension.

4. The method of claim 1 , wherein the characteristics include an indication of a conditional value for at least one of the required parameters.

5. The method of claim 1 , wherein the characteristics include an indication of whether at least one of the required parameters is used to contain a return value.

6. The method of claim 1 , wherein the characteristics include a directionality of at least one of the required parameters.

7. The method of claim 1 , wherein the characteristics include an indication of whether at least one of the required parameters returns a multidimensional variable.

8. The method of claim 1 , wherein the characteristics include an indication of whether a size of at least one of the required parameters is based on another one of the required parameters.

9. The method of claim 1 , wherein the characteristics include an indication of whether at least one of the required parameters is a work space parameter.

10. A computer-readable memory device containing instructions for controlling a data processing system to perform a method comprising the steps of:

receiving 32-bit source code;

generating, from the 32-bit source code, a 32-bit interface file including statements describing characteristics of parameters in the 32-bit source code, wherein generating a 32-bit interface file includes invoking an interface generator that

scans the 32-bit source code and creates the interface file according to a definition; and

adds to the interface file the statements describing characteristics of the parameters by parsing the 32-bit source code; and

automatically generating, based on the statements in the 32-bit interface file, a 32-bit to 64-bit conversion stub that is used by the 32-bit source code to invoke 64-bit code, wherein automatically generating a 32-bit to 64-bit conversion stub includes invoking a stub generator that

reads the 32-bit interface file to populate a hash table with information identifying the parameters in the interface file;

re-reads the 32-bit interface file to populate the hash table with information indicating processing that occurs for the statements in the interface file; and

generates the 32-bit to 64-bit conversion stub using the hash table.

11. The computer-readable memory device of claim 10 , wherein the 32-bit source code has a subprogram with a parameter and wherein generating a 32-bit interface file includes:

determining whether the parameter in the subprogram has input directionality, output directionality, or input and output directionality; and

inserting into the 32-bit interface file code generator statements corresponding to the determined directionality of the parameter in the subprogram.

12. The computer-readable memory device of claim 10 , wherein generating a 32-bit interface file includes:

adding to the interface file statements indicating a number of dimensions of at least one parameter and a number of elements in each dimension.

13. The computer-readable memory device of claim 10 , wherein the characteristics include an indication of a conditional value for at least one of the required parameters.

14. The computer-readable memory device of claim 10 , wherein the characteristics include an indication of whether at least one of the required parameters is used to contain a return value.

15. The computer-readable memory device of claim 10 , wherein the characteristics include a directionality of at least one of the required parameters.

16. The computer-readable memory device of claim 10 , wherein the characteristics include an indication of whether at least one of the required parameters returns a multidimensional variable.

17. The computer-readable memory device of claim 10 , wherein the characteristics include an indication of whether a size of at least one of the required parameters is based on another one of the required parameters.

18. The computer-readable memory device of claim 10 , wherein the characteristics include an indication of whether at least one of the required parameters is a work space parameter.

19. A data processing system comprising:

means for receiving 32-bit source code;

means for generating, from the 32-bit source code, a 32-bit interface file including statements describing characteristics of parameters in the 32-bit source code,

wherein the means for generating a 32-bit interface file includes means for invoking an interface generator that

scans the 32-bit source code and creates the interface file according to a definition; and

adds to the interface file the statements describing characteristics of the parameters by parsing the 32-bit source code; and

means for automatically generating, based on the statements in the 32-bit interface file, a 32-bit to 64-bit conversion stub that is used by the 32-bit source code to invoke 64-bit code, wherein the means for automatically generating a 32-bit to 64-bit conversion stub includes means for invoking a stub generator that

reads the 32-bit interface file to populate a hash table with information identifying the parameters in the interface file;

re-reads the 32-bit interface file to populate the hash table with information indicating processing that occurs for the statements in the interface file; and

generates the 32-bit to 64-bit conversion stub using the hash table.

20. The system of claim 19 , wherein the 32-bit source code includes at least one of an integer parameter and a logical parameter and wherein the means for generating a 32-bit interface includes:

means for determining whether the at least one of an integer and logical parameter has input directionality, output directionality, or input and output directionality; and

means for inserting into the 32-bit interface file code generator statements corresponding to the determined directionality of the at least one parameter.

21. The system of claim 19 , wherein the means for generating a 32-bit interface file includes:

means for adding to the interface file statements indicating a number of dimensions of at least one parameter and a number of elements in each dimension.

22. The system of claim 19 , wherein the characteristics include an indication of a conditional value for at least one of the required parameters.

23. The system of claim 19 , wherein the characteristics include an indication of whether at least one of the required parameters is used to contain a return value.

24. The system of claim 19 , wherein the characteristics include a directionality of at least one of the required parameters.

25. The system of claim 19 , wherein the characteristics include an indication of whether at least one of the required parameters returns a multidimensional variable.

26. The system of claim 19 , wherein the characteristics include an indication of whether a size of at least one of the required parameters is based on another one of the required parameters.

27. The system of claim 19 , wherein the characteristics include an indication of whether at least one of the required parameters is a work space parameter.

Assignments (1)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037303/0336 →