IP Library Granted Patent US 7,010,024
Granted Patent B1
US 7,010,024 · App. 09/689,854 · Granted Mar 7, 2006

Matched filter and spread spectrum receiver

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Quick Facts
Patent No.
US 7,010,024
App. No.
09/689,854
Granted
Mar 7, 2006
Kind
B1
Abstract

A matched filter for implementing the correlation of an input signal and a reference signal. The matched filter comprises N parallel M-sample long shift registers for receiving an equal number of input signals at the sampling frequency of the input signal, wherein N 2. The matched filter also stores K reference signals, wherein K 2, and then multiplexes one of the input signals and one of the reference signals at a time to calculation logic by applying alternately at least one combination of the input signals and the reference signals to the calculation logic. The calculation logic may then calculate the correlation time-dividedly for each combination of an input signal and a reference signal so that correlation results calculated from different signals appear at the output of the calculation means as a sequence.

Claims (49)

1. A matched filter for implementing the correlation of input signals and reference signals, the matched filter comprising:

first means for storing M samples taken from N input signals, wherein N≧2, and in which said M samples of the N input signals are stored one sample at a time at said N input signals' frequencies;

second means for storing K M-sample long reference signals, wherein K≧2 and said M-sample long reference signals correspond to more than one transmitter;

multiplexing means for applying one of said N input signals and one of said M-sample long reference signals at a time from said first and second storage means to calculation means by applying alternately at least one combination of the N input signals and the M-sample long reference signals; and

calculation means for calculating the correlation time-dividedly for a combination of said N input signals and said M-sample long reference signals so that correlation results calculated from different input and reference signals appear at the output of the calculation means as a sequence.

2. A matched filter as claimed in claim 1 , wherein said calculation means comprises a comparator for comparing each sample of the N input signals with the corresponding sample of the M-sample long reference signals and gives M 1-bit comparison results, and an adder means for summing up said M 1-bit comparison results and generating a correlation result at the output of the filter.

3. A matched filter as claimed in claim 2 , wherein said comparator is one of the following: a multiplier, an XOR circuit or an XNOR circuit.

4. The matched filter of claim 1 , further comprising a receiving means for receiving said N input signals from a pre-processing means, wherein said N input signals are each comprised of an I component and a Q component, and wherein said pre-processing means is to process an I in signal a Q in signal for each of said N input signals to provide corresponding I out signals and Q out signals to said receiving means.

5. The matched filter of claim 4 , wherein said pre-processing means is to generate said I out signals and Q out signals as follows:

ACC I =I in ·cos(LO),

I out =ACC I +Q in ·sin(LO),

ACC Q =Q in ·cos(LO), and

Q out =ACC Q −I in ·sin(LO)

where,

ACC I is an initial accumulation register value for I out ,

ACC Q is an initial accumulation register value for Q out , and

LO is a local oscillator frequency.

6. A matched filter for implementing the correlation of input signals and reference signals, the matched filter comprising:

first means for storing M samples taken from N input signals and for storing said M samples of the N input signals one at a time at said N input signals' frequencies;

second means for storing K M-sample long reference signals, wherein K≧2 and said M-sample long reference signals correspond to more than one transmitter;

multiplexing means for applying one of said N input signals and one of said M-sample long reference signals at a time from said first and second storage means to calculation means by applying alternately at least one combination of the N input signals and the M-sample long reference signals to the calculation means; and

calculation means for calculating the correlation time-dividedly for each combination of said N input signals and said M-sample long reference signals so that correlation results calculated from different combinations appear at the output of the calculation means as a sequence.

7. A matched filter as claimed in claim 6 , wherein said calculation means comprises a comparator for comparing each of said M samples of the N input signals with a corresponding sample from said M-sample long reference signals and gives M 1-bit comparison results, and an adder means for summing up said M 1-bit comparison results and generating a correlation result at the output of the filter.

8. A matched filter as claimed in claim 7 , wherein said comparator is one of the following: a multiplier, an XOR circuit or an XNOR circuit.

9. The matched filter of claim 6 , further comprising a receiving means for receiving said N input signals from a pre-processing means, wherein said N input signals are each comprised of an I component and a Q component, and wherein said pre-processing means is to process an I in signal a Q in signal for each of said N input signals to provide corresponding I out signals and Q out signals to said receiving means.

10. The matched filter of claim 9 , wherein said pre-processing means is to generate said I out signals and Q out signals as follows:

ACC I =I in ·cos(LO),

I out =ACC I +Q in ·sin(LO),

ACC Q =Q in ·cos(LO), and

Q out =ACC Q −I in ·sin(LO)

where,

ACC I is an initial accumulation register value for I out ,

ACC Q is an initial accumulation register value for Q out , and

LO is a local oscillator frequency.

11. A spread spectrum receiver comprising a device for detecting a demodulated signal, received by the receiver and converted into digital samples, the device comprising a matched filter for calculating the correlation between an input signal and at least one reference signal, and a controller for comparing the correlation results generated by the matched filter with a predetermined threshold value to determine if a signal is found, the matched filter comprising:

first means for storing M samples taken from N input signals, wherein N≧2, and in which M samples of the N input signals are stored one sample at a time at a frequency of each of the N input signals;

second means for storing K M-sample long reference signals, wherein K≧2 and said M-sample long reference signals correspond to more than one transmitter;

multiplexing means for applying one of said N input signals and one of said M-sample long reference signals at a time from said first and second storage means to calculation means by applying alternately at least one combination of the N input signal and the M-sample long reference signal to the calculation means; and

calculation means for calculating the correlation time-dividedly for a combination of said N input signals and said M-sample long reference signals so that correlation results calculated from different input and reference signals appear at the output of the calculation means as a sequence.

12. A spread spectrum receiver as claimed in claim 11 , wherein said calculation means comprises a comparator for comparing each sample of the N input signals with a corresponding sample from the M-sample long reference signals and gives M 1-bit comparison results, and an adder means for summing up said M 1-bit comparison results and generating a correlation result at the output of the filter.

13. A spread spectrum receiver as claimed in claim 12 , wherein said comparator is one of the following: a multiplier, an XOR circuit or an XNOR circuit.

14. A spread spectrum receiver as claimed in claim 11 , wherein the outputs of the matched filter are complex correlation samples, and that said device comprises an arithmetic unit for squaring both components of the complex correlation sample and sums up the squared components.

15. A spread spectrum receiver as claimed in claim 14 , wherein the arithmetic unit sums up the correlation sample corresponding to the same phase difference of two or more input signals, the sum corresponding to a correlation result that is calculated with one phase difference and whose integration time is M·L samples, wherein M is the length of the matched filter in number of samples and L is the number of correlation samples summed up by an accumulator.

16. A spread spectrum receiver as claimed in claim 11 , wherein said controller processes several comparison results corresponding to the same phase difference and M-sample long reference signal, and, in response to a predetermined proportion of the gathered comparison results indicating that the output value exceeded said threshold value, declares the signal found.

17. A spread spectrum receiver comprising a device for detecting a demodulated signal, received by the receiver and converted into digital samples, the device comprising a matched filter for calculating the correlation between an input signal and at least one reference signal, and a controller for comparing the correlation results generated by the matched filter with a predetermined threshold value to determine if a signal is found, said matched filter comprising:

first means for storing M samples taken from N input signals, wherein N≧1, and in which said M samples of the N input signals are stored one sample at a time at a sample frequency for each of said N input signals;

second means for storing K M-sample long reference signals, wherein K≧2 and said M-sample long reference signals correspond to more than one transmitter;

multiplexing means for applying one of said N input signals and one of said M-sample long reference signals at a time from said first and second storage means to calculation means by applying alternately at least one combination of the N input signals and one of the M-sample long reference signals to the calculation means; and

calculation means for calculating the correlation time-dividedly for each combination of the N input signals and the M-sample long reference signals so that correlation results calculated from different combinations appear at the output of the calculation means as a sequence.

Assignments (11)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2018
From: EEROLA, VILLE; RITONIEMI, TAPANI
To: VLSI SOLUTION OY
Reel/Frame 045390/0241 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2012
From: QUALCOMM ATHEROS TECHNOLOGY LTD.
To: QUALCOMM INCORPORATED
Reel/Frame 029421/0993 →
CHANGE OF NAME Recorded Aug 22, 2011
From: ATHEROS TECHNOLOGY LTD.
To: QUALCOMM ATHEROS TECHNOLOGY LTD.
Reel/Frame 026786/0727 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2008
From: U-NAV MICROELECTRONICS CORPORATION
To: ATHEROS TECHNOLOGY LTD.
Reel/Frame 020609/0116 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jan 14, 2008
From: SIRF TECHNOLOGY, INC.
To: U-NAV MICROELECTRONICS CORPORATION
Reel/Frame 020353/0661 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jan 4, 2008
From: BROADCOM CORPORATION
To: U-NAV MICROELECTRONICS CORPORATION
Reel/Frame 020317/0511 →
GRANT OF PATENT SECURITY INTEREST Recorded Feb 16, 2007
From: U-NAV MICROELECTRONICS CORPORATION
To: BROADCOM CORPORATION
Reel/Frame 018898/0492 →
SECURITY AGREEMENT Recorded Nov 20, 2006
From: U-NAV MICROELECTRONICS CORPORATION
To: SIRF TECHNOLOGY, INC.
Reel/Frame 018535/0387 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2002
From: VLSI SOLUTION OY
To: U-NAV MICROELECTRONICS CORPORATION
Reel/Frame 013042/0250 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2001
From: VLSI SOLUTION OY
To: U-NAV MICROELECTRONICS CORPORATION
Reel/Frame 012116/0467 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2000
From: EEROLA, VILLE; RITONIEMI, TAPANI
To: VLSI SOLUTION OY
Reel/Frame 011344/0755 →