System and method for storing frame header data
View Patent ↗A system and method for storing header information in parallel with corresponding frames of data, wherein the frames of data are stored in a first-in-first-out buffer and wherein the header information is accessed to make routing decisions for the frames of data while avoiding having to read the frames out of the buffer. In one embodiment, this buffer system is implemented in a port of a network switch. Receive logic in the port stores frames of data in the storage elements of a FIFO buffer and concurrently snoops on the frame data to obtain header information. The header information is stored in a buffer separate from the FIFO that stores the frames. The header information can be read from the header buffer rather than the frame buffer. A routing decision for each frame can be made before a previous frame is completely read out of the frame FIFO, hence before the corresponding frame is ready to be transmitted. A timer may also be associated with each header in the header buffer so that it can be determined when frames are stale and must be discarded.
1. A method comprising:
receiving a plurality of frames;
storing the frames in a receive buffer, wherein the receive buffer is configured to be accessed in a first-in-first-out fashion;
storing duplicated header information corresponding to each of the frames in a header storage, wherein the header storage is configured to provide access to the duplicated header information in the same order as the frames;
maintaining a timer corresponding to each duplicated header information in the header storage that indicates how long the corresponding duplicated header information has been in header storage;
retrieving duplicated header information from the header storage, wherein the duplicated header information corresponds to a first frame;
prior to the first frame reaching a head position in the receive buffer, making a routing decision for delivering the first frame to its destination based upon the duplicated header information read from the header storage;
retrieving the first frame from the receive buffer; and
routing the first frame based upon the routing decision.
2. The method of claim 1 , further comprising
retrieving the timer corresponding to the retrieved duplicated header information,
determining whether the timer corresponding to the retrieved duplicated header information exceeds a predetermined maximum value, and
discarding the frame corresponding to the duplicated header information if the timer corresponding to the retrieved duplicated header information exceeds the predetermined maximum value.
3. The method of claim 1 , wherein the receive buffer is a first-in-first-out (FIFO) buffer having a head position and a tail position, wherein entries are written to the tail position and are promoted through the FIFO buffer to the head position, and wherein retrieving the first frame from the receive buffer comprises reading the frame at the head position,
further comprising providing a bypass circuit coupled to the header storage, wherein if no duplicated header information is available at the head of the header storage, the bypass circuit makes next-received duplicated header information immediately available.
4. A frame buffer system comprising:
a receive buffer configured to store a plurality of received frames, wherein the receive buffer is configured to be accessed in first-in-first-out fashion;
a plurality of timers associated with the frames in the receive buffer, wherein each timer indicates the amount of time the corresponding frame has been in the receive buffer;
a header storage configured to store duplicated header information corresponding to each of the frames in the receive buffer;
transfer logic coupled to the receive buffer and header storage, wherein the transfer logic is configured to make a routing decision for delivering each of the frames in the receive buffer to a destination based on the corresponding duplicated header information read from the header storage, the routing decision being made prior to the corresponding frame reaching a head position in the receive buffer, and to transmit each of the frames to a destination port according to the corresponding routing decision; and
a bypass circuit configured to receive first duplicated header information, wherein when duplicated header information is received, if no preceding duplicated header information is currently stored in the header storage, the bypass circuit is configured to make the first duplicated header information available to the transfer logic.
5. The frame buffer system of claim 4 , wherein the timers are stored in a first-in-first-out (FIFO) timer storage, wherein the timers are promoted through the FIFO timer storage as the corresponding frames are promoted through the receive buffer.
6. The frame buffer system of claim 4 , wherein the timers are stored in a random access timer storage, wherein each timer is associated with one of the frames in the receive buffer.
7. The frame buffer system of claim 4 , further comprising a transmit timer associated with the transmit buffer, wherein the transmit timer indicates the amount of time the frame currently residing in the transmit buffer has been in the transmit buffer.