IP Library Granted Patent US 7,035,351
Granted Patent B1
US 7,035,351 · App. 09/705,696 · Granted Apr 25, 2006

Automatic gain control loop apparatus

Assignee: GCT Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,035,351
App. No.
09/705,696
Granted
Apr 25, 2006
Kind
B1
Abstract

A DC offset cancelling circuit with multiple feedback loops suppresses DC offset voltages within an automatic gain control loop apparatus. The apparatus includes a plurality of gain stages connected in series that receive and amplify an input RF signal. Each gain stage includes a corresponding feedback loop to filter the DC offset voltage accumulated in the respective gain stage.

Claims (38)

1. A loop apparatus, comprising:

a plurality of gain stages connected in series to amplify a radio frequency (RF) signal having a voltage, wherein each gain stage includes an input port that receives the RF signal and an output port that transmits the resulting amplified signal, and each gain stage increases the voltage of the RF signal; and

a plurality of feedback loops where each feedback loop is coupled to the output port and the input port of a corresponding one of the gain stages and such that each gain stage is connected to a corresponding feedback loop to cancel a direct current offset voltage of its corresponding gain stage, each feedback loop including a high-pass filter that filters the direct current offset voltage accumulated by its corresponding gain stage.

2. The loop apparatus of claim 1 , wherein each feedback loop includes a direct current offset canceling unit for rejecting the direct current offset voltage accumulated by its corresponding gain stage.

3. The loop apparatus of claim 2 , wherein each direct current offset canceling unit includes the high-pass filter that filters the direct current offset voltage.

4. The loop apparatus of claim 1 , wherein each gain stage includes a variable gain amplifier.

5. The loop apparatus of claim 1 , wherein the plurality of gain stages and feedback loops are mounted on a chip, and each feedback loop includes a capacitor mounted on the chip.

6. The loop apparatus of claim 1 , wherein the RF signal is an analog radio frequency signal.

7. The loop apparatus of claim 1 , wherein the resulting amplified signal comprises an analog signal.

8. The loop apparatus of claim 1 , further comprising a mixer that demodulates the resulting amplified signal and forms a demodulated baseband signal.

9. The loop apparatus of claim 8 , further comprising an analog-to-digital converter that converts an analog signal corresponding to the resulting amplified signal to a digital data stream.

10. The loop apparatus of claim 1 , wherein the loop apparatus is provided within a single amplification unit.

11. The loop apparatus of claim 1 , further comprising an antenna unit to receive the RF signal.

12. The loop apparatus of claim 11 , wherein the antenna unit provides the RF signal to at least a first one of the gain stages.

13. A method for controlling a gain of a radio frequency (RF) signal, comprising:

amplifying the voltage of an RF signal by propagating the RF signal through a plurality of gain stages connected in series, wherein each gain stage increases the voltage of the RF signal, and includes an input port receiving the RF signal and an output port transmitting the resulting amplified signal; and

canceling an undesired offset of each gain stage using a plurality of feedback loops, wherein each feedback loop is connected to the output port and the input port of a corresponding one of the gain stages, such that each gain stage is connected to a corresponding feedback loop that cancels the undesired offset of its corresponding gain stage, each feedback loop including a direct current offset canceling unit having a high-pass filter to cancel the undesired offset by its corresponding gain stage.

14. The method of claim 13 , wherein the resulting amplified signal comprises an analog signal.

15. The method of claim 13 , further comprising demodulating the resulting amplified signal and forming a demodulated baseband signal.

16. The method of claim 14 , further comprising converting an analog signal corresponding to the resulting amplified signal to a digital data stream.

17. The method of claim 13 , wherein the amplifying and canceling occur within a single amplification unit.

18. The method of claim 13 , further comprising receiving the RF signal from an antenna unit.

19. A direct conversion receiver, comprising:

an amplification unit that receives and amplifies a radio frequency (RF) signal, wherein the amplification unit includes:

a plurality of gain stages connected in series to amplify the RF signal having a voltage, wherein each gain stage includes an input port that receives the RF signal and an output port that transmits the resulting amplified signal, and each gain stage increases the voltage of the RF signal, and

a plurality of feedback loops where each feedback loop is coupled to the output port and the input port of a corresponding one of the gain stages and such that each gain stage is connected to a corresponding feedback loop to cancel an undesired offset of its corresponding gain stage, each feedback loop including a direct current offset canceling unit having a high-pass filter to filter a direct current offset voltage; and

a mixer that demodulates the amplified signal by mixing the amplified RF signal with a local oscillation signal to form a demodulated baseband signal.

20. The direct conversion receiver of claim 19 , further comprising an analog-to-digital converter that converts the demodulated baseband signal to a digital data stream.

21. The direct conversion receiver of claim 20 , further comprising a channel selection filter that removes an out-of-band signal from the demodulated baseband signal.

22. The direct conversion receiver of claim 19 , wherein the undesired offset is a direct current offset voltage, and each feedback loop includes the direct current offset canceling unit for rejecting the direct current offset voltage accumulated by its corresponding gain stage.

23. The direct conversion receiver of claim 22 , wherein each direct current offset canceling unit includes the high-pass filter that filters the direct current offset voltage.

24. The direct conversion receiver of claim 19 , wherein each gain stage includes a variable gain amplifier.

25. The direct conversion receiver of claim 19 , wherein the plurality of gain stages and feedback loops are mounted on a chip, and each feedback loop includes a capacitor mounted on the chip.

26. The direct conversion receiver of claim 19 , wherein the RF signal is an analog radio frequency signal.

27. The direct conversion receiver of claim 19 , wherein the mixer receives a plurality of clock signals to generate the local oscillation signal, wherein each of the clock signals has a frequency less than the local oscillation signal.

28. The direct conversion receiver of claim 19 , wherein the resulting amplified signal comprises an analog signal.

29. The direct conversion receiver of claim 19 , wherein the amplification unit includes an antenna unit to receive the RF signal.

30. The direct conversion receiver of claim 29 , wherein the antenna unit provides the RF signal to at least a first one of the gain stages.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Dec 17, 2015
From: COMERICA BANK
To: GCT SEMICONDUCTOR, INC.
Reel/Frame 037327/0085 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 29, 2013
From: GCT SEMICONDUCTOR, INC.
To: COMERICA BANK
Reel/Frame 030112/0447 →
MERGER Recorded May 31, 2001
From: GLOBAL COMMUNICATION TECHNOLOGY, INC.
To: GCT SEMICONDUCTOR, INC.
Reel/Frame 011856/0127 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2000
From: PARK, JOONBAE; KIM, WONCHAN; LEE, KYEONGHO; JEONG, DEOG-KYOON
To: GLOBAL COMMUNICATION TECHNOLOGY, INC.
Reel/Frame 011274/0035 →
Continuity (3)
Continuation In Part 0912186300 · Jul 24, 1998
Continuation In Part 0912160100 · Jul 24, 1998
Provisional Application 6016487400 · Nov 12, 1999