Isolation of I2C buses in a multiple power domain environment using switches
View Patent ↗A disk enclosure includes a first enclosure controller powered by a first voltage circuit and coupled to a first I2C bus, a second enclosure controller powered by a second voltage circuit and coupled to a second I2C bus, and a switch coupled between the first and the second I2C buses. The first switch de-couples the first and the second I2C buses when the voltage output of the second voltage circuit falls below a predetermined threshold.
1. A disk enclosure comprising:
a first enclosure controller coupled to first and second buses;
a first plurality of elements coupled to the first bus;
a first voltage circuit powering the first enclosure controller and the first plurality of elements in a first power domain;
a second enclosure controller coupled to third and fourth buses;
a second plurality of elements coupled to the fourth bus;
a second voltage circuit powering the second enclosure controller and the second plurality of elements in a second power domain;
a first switch coupled between the first and the third buses, the first switch operable to de-couple the first and the third buses when the voltage output from the second voltage circuit falls below a predetermined threshold; and
a second switch coupled between the second and the fourth buses, the second switch operable to de-couple the second and the fourth buses when the voltage output from the first voltage circuit falls below the predetermined threshold.
2. The disk enclosure of claim 1 , wherein the first plurality of elements includes at least one of a first temperature sensor, a first memory, and a first backplane controller.
3. The disk enclosure of claim 2 , wherein the backplane controller is coupled to a first port bypass circuit, the first port bypass circuit operable to bypass a first disk drive.
4. The disk enclosure of claim 3 , wherein the second plurality of elements includes at least one of a second temperature sensor, a second memory, and a second backplane controller.
5. The disk enclosure of claim 4 , wherein the second backplane controller is coupled to a second port bypass circuit, the second port bypass circuit operable to bypass a second disk drive.
6. The disk enclosure of claim 1 , wherein:
the first enclosure controller is coupled to a fifth bus;
the second enclosure controller is further coupled to a sixth bus;
a third switch coupled between the fifth bus and a seventh bus, the third switch operable to de-couple the fifth and the seventh buses when the voltage output from the first voltage circuit falls below the predetermined threshold; and
a fourth switch coupled between the sixth bus and the seventh bus, the fourth switch operable to de-couple the sixth and seventh buses when the voltage output from the second voltage circuit falls below the predetermined threshold.
7. The disk enclosure of claim 6 , wherein the seventh bus is further coupled to a third plurality of elements.
8. The disk enclosure of claim 7 , wherein the third plurality of elements includes at least one of a third temperature sensor, a third memory, a third backplane controller, and an I/O expander.
9. The disk enclosure of claim 8 , wherein the I/O expander is coupled to at least one battery.
10. The disk enclosure of claim 8 , wherein the I/O expander is coupled to at least one power supply.
11. The disk enclosure of claim 1 , wherein the first and the second buses comprise I2C buses.