IP Library Granted Patent US 6,878,984
Granted Patent B2
US 6,878,984 · App. 09/761,693 · Granted Apr 12, 2005

Non-volatile flash memory having a specific difference between source/floating gate and drain/floating gate overlapped portions

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Quick Facts
Patent No.
US 6,878,984
App. No.
09/761,693
Granted
Apr 12, 2005
Kind
B2
Abstract

A structure of a non-volatile flash memory, in which a punch-through current is suppressed and the area of a memory cell is reduced, is provided. The non-volatile flash memory being a NOR type non-volatile flash memory provides floating gates and a common source line, and drains. And at the structure of the non-volatile flash memory, a region overlapped one of the drains and one of the floating gates in a memory cell is larger than a region overlapped the common source and one of the floating gates in the memory cell.

Claims (10)

1. A structure of a non-volatile flash memory that is a NOR type non-volatile flash memory, which provides floating gates and a common source line, wherein:

the difference (a−b) between a region “a” overlapped one of drains and one of said floating gates in a memory cell, and a region “b” overlapped a source and one of said floating gates in said memory cell is 0.02 μm or more.

2. A structure of a non-volatile flash memory that is a NOR type non-volatile flash memory, which provides floating gates and a common source line in accordance with claim 1 , wherein:

said source is composed of first sources and a second source, and said first sources and said second source are formed in a state that said first and second sources are contacted with one another, and said first sources are formed at regions overlapped with said floating gates.

3. A structure of a non-volatile flash memory that is a NOR type non-volatile flash memory, which provides floating gates and common source line in accordance with claim 2 , wherein:

the impurity concentration of said second source is higher than that of said first sources.

4. A structure of a non-volatile flash memory that is a NOR type non-volatile flash memory, which provides floating gates and a common source line in accordance with claim 2 , wherein:

said source composed of said first and second sources is formed in a state that said first and second sources are unified.

5. The structure of claim 1 , wherein “a” is more that 0.03 μm and “b” is less than 0.01 μm.

6. The structure of claim 1 , wherein (a−b) is more that 0.05 μm.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →