Granted Patent
Utility
US 6,577,153
· Confirmation No. 4684
SEMICONDUCTOR INTEGRATED CIRCUIT
Inventor:
Hidetaka Kodama
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-02-08 | TRNA |
Transmittal of New Application | 4 | View | |
| 2001-02-08 | SPEC |
Specification | 17 | View | |
| 2001-02-08 | CLM |
Claims | 5 | View | |
| 2001-02-08 | ABST |
Abstract | 1 | View | |
| 2001-02-08 | DRW |
Drawings-only black and white line drawings | 9 | View | |
| 2001-02-08 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Hidetaka Kodama
Tokyo, JAPAN
Attorneys & Agents of Record
Classification
USPC
326/27
H10D84/85
Foreign Priority
JP2000-210762
·
2000-07-12
·
JAPAN
Publication
- Pub. No.
- US20020005557A1
- Pub. Date
- 2002-01-17
Patent Term Adjustment
-27days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-01-20
from
KODAMA, HIDETAKA
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-02-08
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