IP Library Granted Patent US 6,927,489
Granted Patent B1
US 6,927,489 · App. 09/787,526 · Granted Aug 9, 2005

Semiconductor device provided with rewiring layer

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Quick Facts
Patent No.
US 6,927,489
App. No.
09/787,526
Granted
Aug 9, 2005
Kind
B1
Abstract

In a small semiconductor device having external terminals on a semiconductor element and a semiconductor module mounted with the small semiconductor device, disconnection of the external terminals is prevented when a temperature change occurs under the conditions that the semiconductor device is mounted on a printed circuit board. To achieve this a projection is formed on a land which is an external terminal bonding area of the semiconductor device, and a protruded portion of the projection is bonded to the external terminal. An intervening portion of a protective film made of resin material is formed between the lands and semiconductor element.

Claims (36)

1. A semiconductor device comprising:

a semiconductor substrate formed with pads;

a passivation film formed on a surface of said semiconductor substrate on a pad forming side; and

lands for connection to external terminals, said lands being formed on an insulating film formed on a surface of said passivation film opposite to said semiconductor substrate;

wherein:

said pads and said lands are connected by conductive wiring lines;

said external terminals are solder bumps and said lands are formed of a material comprising Cu; and

projections, made of a material comprising Cu, are formed on each of said lands at positions where said lands are connected to the external terminals.

2. A semiconductor device comprising:

a silicon substrate formed with pads;

a passivation film formed on a surface of said silicon substrate on a pad forming side;

lands for connection to external terminals which are solder bumps, said lands being made of a material comprised of Cu and formed on the surface of said silicon substrate on the pad forming side, respectively; and

wiring lines connecting said pads and said lands;

wherein:

an insulating film is formed between said passivation film and said lands;

projections, made of a material comprising Cu, are formed on said lands on a surface opposite to said silicon substrate; and

said projections are connected to the external terminals, respectively.

3. A semiconductor device comprising:

a semiconductor substrate formed with pads;

a passivation film formed on a surface of said semiconductor substrate on a pad forming side;

lands for connection to external terminals, said lands being formed on the surface of said semiconductor substrate on the pad forming side;

wherein said external terminals are solder bumps and said lands are formed of a material comprising Cu;

the external terminals being connected to said lands;

wherein said projections, made of a material comprising Cu, are formed on said lands at positions where said lands are connected to the external terminals, respectively; and

wiring lines connecting said pads and said lands;

wherein an insulating protective film is formed on the surface of said semiconductor substrate on the pad forming side in an area other than the external terminals.

4. A semiconductor device according to any one of claims 1 , 2 , or 3 , wherein in a semiconductor module having the semiconductor device mounted on a printed circuit board via the external terminals, a bonding area between a bonding pad of the printed circuit board and one of the external terminals is set larger than a bonding area between one of the projections and said one of the external terminals in a direction of disposing the external terminals.

5. A semiconductor device according to any one of claims 1 , 2 , or 3 , to wherein in a semiconductor module having the semiconductor device mounted on a printed circuit board via the external terminals, an area near a bonding area between a bonding pad of the printed circuit board and one of the external terminals is covered with resin.

6. A semiconductor device according to claim 1 or 2 , wherein said projections each include a first portion which extends into a corresponding one of said external terminals and a second portions located between a corresponding one of said lands and said first portion.

7. A semiconductor device according to claim 6 , wherein each of said first portions of said projections has substantially the same width as a corresponding one of said second portions of said projections.

8. A semiconductor device according to claim 1 , wherein the projections are positioned in projected areas of said lands.

9. A semiconductor device according to claim 2 , wherein the projections are positioned in projected areas of said lands.

10. A semiconductor device according to claim 1 , wherein the external terminals and the projections are respectively each bonded via a metal thin film formed on a surface of the projection.

11. A semiconductor device according to claim 2 , wherein the external terminals and the projections are respectively each bonded via a metal thin film formed on a surface of the projection.

12. A semiconductor device according to claim 1 ,

wherein a protective film having an opening in a region in which said land is disposed is formed on said conductive wiring and a portion of said projection is projected from a surface of said protective film.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →