Patent Application
Utility
App. No. 09/791,747
· Confirmation No. 1182
Method of and circuit for protection against overcurrent
Inventor:
Moritaka Iyoda
Abandoned -- Failure to Respond to an Office Action
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-04-09 | DRW |
Drawings-only black and white line drawings | 3 | View | |
| 2001-02-26 | TRNA |
Transmittal of New Application | 1 | View | |
| 2001-02-26 | SPEC |
Specification | 13 | View | |
| 2001-02-26 | CLM |
Claims | 3 | View | |
| 2001-02-26 | ABST |
Abstract | 1 | View | |
| 2001-02-26 | DRW |
Drawings-only black and white line drawings | 5 | View | |
| 2001-02-26 | OATH |
Oath or Declaration filed | 1 | View |
Inventors
Moritaka Iyoda
Tokyo, JAPAN
Attorneys & Agents of Record
Classification
USPC
361/58
Prosecution
- Examiner
- KITOV, ZEEV V
- Art Unit
- 2836
- Docket No.
- Q63243
- Confirmation No.
- 1182
Foreign Priority
2000-050747
·
2000-02-28
·
JAPAN
Publication
- Pub. No.
- US20010017756A1
- Pub. Date
- 2001-08-30
No related applications found.
from
NEC CORPORATION
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-02-25
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Quick Facts
- App. No.
- 09/791,747
- Filed
- 2001-02-26
- Pub. No.
- US20010017756A1
- Examiner
- KITOV, ZEEV V
- Art Unit
- 2836
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