Granted Patent B2

US 7,006,489 · App. 09/792,265 · Granted Feb 28, 2006

Abstract

Claims (41)

1. A voice packet switch, comprising:

a plurality of ATM packet processing circuits operable to receive and transmit data packets over a plurality of ATM transmission links and operable to extract data from the ATM data packs and insert the extracted data into data frames of a predetermined protocol; and

a time slot interchange coupled to the plurality of ATM packet processing circuits and operable for DS0-level and other per-voice-channel-level switching of;

data frames received from the ATM packet processing circuits; and

multiplexed PCM data received and transmitted over a plurality of PCM transmission links; wherein

the voice packet switch is configured for operation as;

a PSTN network switching element; and

a network gateway bridging a PSTN network and a packet-based network; and

the voice packet switch is deployed as;

the PSTN network switching element; or

the network gateway.

2. The voice packet switch, as set forth in claim 1 , wherein the plurality of ATM packet processing circuits comprise AAL1 packet processing circuits operable to receive and transmit AAL1 cells.

3. The voice packet switch, as set forth in claim 1 , wherein the plurality of ATM packs processing circuits comprise AAL2 packet processing circuits operable to receive and transmit AAL2 cells and operable to extract data from the AAL2 cells and inert the extracted data into HDLC data frames for switching by the time slot interchange.

4. The voice packet switch, as set forth in claim 1 , wherein the plurality of ATM packet processing circuits comprise VoIP packet processing circuit, operable to receive and transmit VoIP data packets and operable to extract data from the VoIP data packets and insert the extracted data into HDLC data frames for switching by the time slot interchange.

5. The voice packet switch, as set forth in claim 1 , further comprising at least one digital signal processing circuit coupled between the plurality of packet processing circuits and the time slot interchange operable to convert between ATM data packets and multiplexed PCM data.

6. The voice packet switch, as set forth in claim 5 , wherein the at least one digital signal processing circuit comprises at least one echo canceling circuit.

7. The switching system, as set forth in claim 5 , wherein the at least one digital signal processing circuit comprises at least one voice compression circuit.

8. A switching system, comprising:

at least one packet processing circuit configured to process non-TDM data packets received and transmitted over at least one packet on link; and

a switch fabric having:

at least one first channel configured to receive and transmit the non-TDM data packets over the at least one packet transmission link; and

at least one second channel configured to receive and transmit multiplexed TDM data over at least one non-packet transmission link;

wherein the switch fabric is operable for DS0-level another per-voice channel level switching between the at least one first channel and the at least one second channel, wherein the switching stem is configured for operation as: PSTN network switching element; and a network gateway bridging a PSTN network and a packet-based network; and wherein the switching system is deployed as: the PSTN network switching element; or the network gateway.

9. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract the non-TDM data packets received over the at least one packet transmission link and transmit to the switch fabric using a data link protocol.

10. The switching system, as let forth in claim 8 , wherein the at least one packet processing circuit is operable to extract compressed voice data received over the at least one packet transmission link and transmit to the switch fabric for switching using a data link protocol.

11. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract AAL2 voice data received over the at least one packet transmission link and transmit to the switch fabric for switching using high-level data link control protocol.

12. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract VoIP voice data received over the at least one packet transmission link and transmit to the switch fabric for switching using high-level data link control protocol.

13. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract data received from the switch fabric and insert the extracted data into packets for transmission over the at least one packet transmission link.

14. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract voice data received from the switch fabric and insert the extracted voice data into AAL2 cells for transmission over the at least one packet transmission link.

15. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit is operable to extract voice data received from the switch fabric and insert the extracted voice data into VoIP packets for transmission over the at least one packet transmission link.

16. The switching system, as set forth in claim 8 , wherein the switch fabric is a time slot interchange switch fabric.

17. The switching system, as set forth in claim 8 , wherein the switch fabric is operable to switch multiplexed uncompressed voice data.

18. The switching system, as set forth in claim 8 , wherein the switch fabric is operable to switch PCM data.

19. The switching system, as set forth in claim 8 , wherein the at least one packet transmission link includes a plurality of packet transmission links, including a multiplexed VoIP data transmission link and a multiplexed AAL2 data transmission link.

20. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit includes at least one AAL1 packet processing circuit operable to interface with at least one ATM transmission link.

21. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit includes at least one AAL2 packet processing circuit operable to interface with at least one ATM transmission link.

22. The switching system, as set forth in claim 8 , wherein the at least one packet processing circuit includes at least one VoIP packet processing circuit operable to interface with at least one IP transmission link.

23. The switching system, as set forth in claim 8 , further comprising at least one digital signal circuit coupled between the at least one packet processing circuit and the switch fabric and operable to convert between a first data form corresponding to the at least one packet transmission link and a first data form corresponding to the at least one non-packet transmission link.

24. The switching system, as set forth in claim 8 , further comprising at least one digital signal processing circuit coupled between the at least one packet processing circuit and the switch fabric and operable to convert between a compressed data from corresponding to the at least one packet transmission link and an uncompressed data form corresponding to the at least one non-packet transmission link.

25. The switching system, as set forth in claim 24 , wherein the at least one digital signal processing circuit comprises at least one echo canceling circuit.

26. The switching system, as set forth in claim 24 , wherein the at least one digital signal processing circuit comprises at least one voice compression circuit.

Assignments (9)