Method and system for patching ROM code
View Patent ↗A method and system for overriding selected ROM code functions or adding new ROM code functions within a processing system. A system designer determines an existing ROM address for the selected existing code function or a desired ROM address for the new code function. The system designer then programs a patch to replace the selected existing code function or programs a new code function. The patch or new code function is then loaded into a first memory. A loader module is also programmed and loaded into the first memory. Upon system boot-up, the loader module transfers any patches or new code functions within the first memory into a second memory that is memory-mapped to the ROM. This second memory can be accessed by the processor at a faster rate than the processor can access ROM. During a processor request cycle, the processor first examines the second memory for the presence of a desired ROM code function. If a patch or a new code function that has been transferred into the second memory maps to the location of the desired code function in ROM, then the processor will fetch the patch or new code function from the second memory.
1. In a processing system, a method of providing a patch to replace a selected existing code function in a ROM or adding a new code function, the method comprising the steps of:
determining an existing ROM address for the selected existing code function or a desired ROM address for the new code function;
installing a loader module in a first location in a first memory;
installing the patch or the new code function in a second location in the first memory, the patch comprising a replacement code function;
pre-loading the patch or the new code function by transferring the patch or the new code function in response to instructions in the loader module before the patch or the new code is required by the processor to a cache, the cache being configured to cache instructions from the ROM and from the first memory, wherein the cache is memory-mapped to the existing ROM address for the selected code function or the desired ROM address for the new code function; and
when requiring instructions located at the existing ROM address or the desired ROM address, fetching the patch from the cache rather than the ROM, or fetching the new code function from the cache.
2. The method of claim 1 , the step of pre-loading the patch or the new code function by transferring the patch or the new code function in response to instructions in the loader module during system boot-up to a cache comprising transferring the patch or the new code function to a cache dedicated to the processor.
3. The method of claim 1 , the step of pre-loading the patch or the new code function by transferring the patch or the new code function in response to instructions in the loader module during system boot-up to a cache comprising transferring the patch or the new code function to a cache dedicated to storing the patch or the new code function.
4. The method of claim 1 , further including the step of locking a location in the cache to which the patch or the new code function has been transferred to prevent the patch or the new code function from being flushed from the cache.
5. The method of claim 1 , the step of installing the patch or the new code function in the second location in the first memory comprising installing the patch or the new code function into a flash memory.
6. The method of claim 1 , the step of installing the patch or the new code function in the second location in the first memory comprising installing the patch or the new code function into an SRAM.
7. The method of claim 1 , the step of installing the patch or the new code function in the second location in the first memory comprising installing the patch or the new code function into a one-time programmable ROM.
8. The method of claim 1 , the step of installing the patch or the new code function in the second location in the first memory comprising installing the patch or the new code function into an EEPROM.
9. A system for repairing a selected existing code function or adding a new code function in a ROM, the system comprising:
a processor for processing instructions and data;
a ROM communicatively coupled to the processor for storing instructions and data, the ROM comprising a selected existing code function with an existing ROM address;
a first memory communicatively coupled to the processor and comprising a loader module and a patch or a new code function, the patch comprising a replacement code function; and
a cache communicatively coupled to the processor and the first memory and memory-mapped to the ROM, the cache being configured to cache instructions from the ROM and from the first memory;
wherein the processor is programmed for
pre-loading the patch or the new code function by transferring the patch before the patch is required by the processor to a first location in the cache that is memory mapped to the existing ROM address of the selected existing code function, or by transferring the new code function before the new code function is required by the processor to a second location in the cache that is memory mapped to a desired ROM address, and
wherein when the processor requires an instruction located at the existing ROM address or the desired ROM address, the processor fetches the patch from the cache rather than the ROM, or fetches the new code function from the cache.
10. The system of claim 9 , wherein the cache is dedicated to the processor.
11. The system of claim 9 , wherein the cache is dedicated to storing the patch or the new code function.
12. The system of claim 9 , wherein the first or second locations are locked to prevent the patch or the new code function from being flushed form the cache.
13. The system of claim 9 , wherein the first memory is a flash memory.
14. The system of claim 9 , wherein the first memory is an SRAM.
15. The system of claim 9 , wherein the first memory is a one-time programmable ROM.
16. The system of claim 9 , wherein the first memory is an EEPROM.