Image display apparatus and driving method thereof

1. An image display apparatus comprising:

a display panel including a plurality of pixels;

a control circuit for controlling said display panel;

a signal line arranged inside said display panel to provide a display signal to said pixels;

wherein each pixel has at least one or more switches and a first capacitance for storing said display signal input through said signal line as a charge for a designated period of time; and

means for rewriting said display signal stored in said first capacitance into said first capacitance without using said signal line in response to an instruction from said control circuit;

wherein each pixel has (n+1) or more plural capacitances, where “n” is an integer no less than 1, for storing an n-bit display signal as a charge for a designated period of time.

2. An image display apparatus as claimed in 1, wherein a data length of said display signal stored in said each pixel as a charge is 1-bit.

3. An image display apparatus as claimed in claim 1 , wherein said first capacitance has a terminal connected to a gate of a first field effect transistor formed inside said each pixel.

4. An image display apparatus as claimed in claim 3 , wherein a drain of said first field effect transistor is connected to ground.

5. An image display apparatus as claimed in claim 3 , wherein

one terminal of said first capacitance is connected to a gate of a second field effect transistor formed inside said pixel; and

one terminal of said second field effect transistor is connected to a capacitance composed of liquid crystal.

6. An image display apparatus as claimed in claim 1 , wherein said first capacitance includes capacitance composed of liquid crystal.

7. An image display apparatus as claimed in claim 6 , wherein said pixel includes means for making said display signal rewritten in said first capacitance take two voltage values alternately for every rewrite operation.

8. An image display apparatus as claimed in claim 7 , wherein said first capacitance is connected through a first switch formed inside said pixel to an output of an inverter circuit formed inside said pixel.

9. An image display apparatus as claimed in claim 7 , wherein said first capacitance is connected through a second switch formed inside said pixel to an input of an inverter circuit formed inside said pixel.

10. An image display apparatus as claimed in claim 8 , wherein said inverter circuit is configured as a CMOS (Complementary Metal Oxide Semiconductor) inverter circuit.

11. An image display apparatus as claimed in claim 1 , wherein said first capacitance included inside said plural capacitances includes a capacitance composed of liquid crystal.

12. An image display apparatus as claimed in claim 11 , wherein said pixel includes means for inputting sequentially an n-bit display signal as a charge into said first capacitance.

13. An image display apparatus as claimed in claim 12 , wherein said pixel includes means for forming an (n+1)st n-bit display signal input sequentially as a charge into said first capacitance to be an inverted signal of the display signal.

14. An image display apparatus as claimed in claim 1 , wherein said pixel has a number of amplifier circuits identical to the number of said plural capacitances.

15. An image display apparatus as claimed in claim 14 , wherein said amplifier circuits are composed of inverter circuits.

16. An image display apparatus as claimed in claim 15 , wherein said inverter circuits are composed of CMOS circuits.

17. An image display apparatus as claimed in claim 1 , wherein each pixel has a charge transfer device (CTD).

18. An image display apparatus comprising:

a display panel including a plurality of pixels, each pixel having at least one or more switches and a first capacitance;

a control circuit for controlling said display panel;

a signal line arranged inside said display panel to provide a display signal to said pixels; and

means for rewriting said display signal stored in said first capacitance into said first capacitance without using said signal line in response to an instruction from said control circuit;

wherein each pixel having at least one or more switches and said first capacitance, stores said display signal input through said signal line as a charge for a designated period of time; and

wherein each pixel has a charge transfer device (CTD);

that is a Bucket Brigade Device (BBD).

19. An image display apparatus as claimed in claim 18 , wherein:

said charge transfer device has plural transfer gates; and

said control circuit includes means for driving individual plural transfer gate separately.

20. An image display apparatus as claimed in claim 19 , wherein said plural transfer gates in each pixel are connected to another pixel commonly among said plurality of pixels.

21. An image display apparatus as claimed in claim 20 , wherein said plural transfer gates in each pixel are substantially connected to another pixel among all pixels in said display panel.

22. An image display apparatus as claimed in claim 18 , wherein:

said charge transfer device has plural transfer gates; and

said control circuit includes means for driving individual plural transfer gates with a two-phase clock.

23. An image display apparatus as claimed in claim 22 , wherein said plural transfer gates in each pixel are connected to one another commonly among plural pixels.

24. An image display apparatus as claimed in claim 23 , wherein said plural transfer gates in each pixel are substantially connected to one another among all pixels in said display panel.

25. An image display apparatus as claimed in claim 18 , wherein said first capacitance includes capacitance composed of liquid crystal.

26. An image display apparatus as claimed in claim 25 , wherein each pixel includes means for inputting sequentially an n-bit display signal as a charge into said first capacitance.

27. An image display apparatus as claimed in claim 26 , wherein said pixel includes means for forming an (n+1)st n-bit display signal input sequentially as a charge into said first capacitance to be an inverted signal of the display signal.

28. An image display apparatus as claimed in claim 25 , wherein said first capacitance is input to said charge transfer device (CTD).

29. An image display apparatus as claimed in claim 18 , wherein an output of said charge transfer device (CTD) has an amplifier circuit.

30. An image display apparatus as claimed in claim 29 , wherein said amplifier circuit is an inverter circuit.

31. An image display apparatus as claimed in claim 30 , wherein said inverter circuits are composed of CMOS circuits.

32. An image display apparatus comprising:

a display panel including a plurality of pixels, each pixel having at least one or more switches and a first capacitance;

a control circuit for controlling said display panel;

a signal line arranged inside said display panel to provide a display signal to said pixels; and

means for rewriting said display signal stored in said first capacitance into said first capacitance without using said signal line in response to an instruction from said control circuit;

wherein each pixel having at least one or more switches and said first capacitance, stores said display signal input through said signal line as a charge for a designated period of time; and

wherein one terminal of said first capacitance is connected to a gate of a field effect transistor with its one of current terminals connected to a luminescence device formed inside said pixel.

33. An image display apparatus as claimed in claim 32 , wherein said luminescence device is an organic light emitting diode.

34. An image display apparatus comprising:

a display panel including a plurality of pixels, each pixel having at least one or more switches and a first capacitance;

a control circuit for controlling said display panel;

a signal line arranged inside said display panel to provide a display signal to said pixels; and

means for rewriting said display signal stored in said first capacitance into said first capacitance without using said signal line in response to an instruction from said control circuit, wherein:

each pixel having at least one or more switches and said first capacitance, stores said display signal input through said signal line as a charge for a designated period of time;

said one or more switches each is composed of a thin-film transistor (TFT);

a channel film of said TFT is formed by poly-Si TFT; and

said pixel includes a charge transfer device that is a Bucket Brigate Device (BBD).

35. An image display apparatus as claimed in claim 34 , wherein the channel film of said TFT and a channel film of said BBD are formed by an identical process.

36. An image display apparatus as claimed in claim 34 , wherein a gate electrode of said TFT and a gate electrode of said BBD are formed by an identical process.

37. A drive method of an image display apparatus comprising a display panel including a plurality of pixels each pixel having at least one or more switches and a first capacitance; a control circuit for controlling said display panel; and a signal line arranged inside said display panel for inputting a display signal into said pixel, said method comprising:

storing said display signal input through said signal-line in said first capacitance, as a charge for a designated period of time, and

when said display signal is stored in said first capacitance, rewritting said display signal into said first capacitance without using said signal line in response to an instruction from said control circuit, wherein:

each pixel has plural capacitances and one or more amplifier circuits,

plural display signals stored in said plural capacitances are input sequentially to said amplifier circuits,

said first capacitance includes capacitance formed between a couple of display panel common electrodes with liquid crystal, and

an output of said amplifier circuit is input through an input switch to said first capacitance with a designated time interval.

38. A drive method of an image display apparatus as claimed in claim 37 , wherein:

said display signal formed by inverting a previous display signal, is rewritten into said first capacitance at every rewrite operation; and

said common electrode is driven to be inverted substantially in synchronization with said rewrite operation of an inverted signal.

39. A drive method of an image display apparatus as claimed in claim 37 , wherein said designated time interval with which said amplifier circuit inputs a display signal through said input switch to said first capacitance is defined so as to increase substantially twice as long as individual display signals.

40. A drive method of an image display apparatus as claimed in claim 37 , wherein said common electrode is also driven to be inverted substantially in synchronization with an overall cycle of said amplifier circuit writing a display signal through said input switch to said first capacitance.

41. A drive method of an image display apparatus as claimed in claim 37 , wherein a writing operation for display signals having analog voltage or multi-valued voltage levels is performed by interrupting a rewrite operation for said first capacitance in said pixel and using said signal line to said first capacitance instead.

42. A drive method of an image display apparatus comprising a display panel including a plurality of pixels each pixel having at least one or more switches and a first capacitance; a control circuit for controlling said display panel; and a signal line arranged inside said display panel for inputting a display signal into said pixel, said drive method comprising:

storing said display signal input through said signal-line in said first capacitance, as a charge for a designated period of time, and

when said display signal is stored in said first capacitance, rewritting said display signal into said first capacitance without using said signal line in response to an instruction from said control circuit, wherein:

each pixel has plural capacitances and one or more amplifier circuits,

plural display signals stored in said plural capacitances are input sequentially to said amplifier circuits, and

an individual single bit of said display signal is written sequentially to individual pixels when writing plural display signals through said signal line to said plural capacitances.